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LC875932A Folha de dados(PDF) 4 Page - Sanyo Semicon Device

Nome de Peças LC875932A
Descrição Electrónicos  CMOS IC Internal 32K/24K/16K-byte ROM and 1024-byte RAM 8-bit 1-chip Microcontroller
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Fabricante Electrônico  SANYO [Sanyo Semicon Device]
Página de início  https://www.sanyo-av.com/us/
Logo SANYO - Sanyo Semicon Device

LC875932A Folha de dados(HTML) 4 Page - Sanyo Semicon Device

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LC875932A/24A/16A
No.A0125-4/23
System Clock Divider Function
• Can run on low current.
• The minimum instruction cycle selectable from 300ns, 600ns, 1.2μs, 2.4μs, 4.8μs, 9.6μs, 19.2μs, 38.4μs,
and 76.8
μs (at a main clock rate of 10MHz).
Standby Function
• HALT mode: Halts instruction execution while allowing the peripheral circuits to continue operation.
1) Oscillation is not halted automatically.
2) There are three ways of resetting the HALT mode.
(1) Setting the reset pin to the low level
(2) System resetting by watchdog timer
(3) Occurrence of an interrupt
• HOLD mode: Suspends instruction execution and the operation of the peripheral circuits.
1) The CF, RC, and crystal oscillators automatically stop operation.
2) There are four ways of resetting the HOLD mode.
(1) Setting the reset pin to the low level
(2) System resetting by watchdog timer
(3) Having an interrupt source established at either INT0, INT1, INT2, INT4, or INT5
* INT0 and INT1 HOLD mode reset is available only when level detection is set.
(4) Having an interrupt source established at port 0
• X'tal HOLD mode: Suspends instruction execution and the operation of the peripheral circuits except the base timer.
1) The CF and RC oscillators automatically stop operation.
2) The state of crystal oscillation established when the X'tal HOLD mode is entered is retained.
3) There are five ways of resetting the X'tal HOLD mode.
(1) Setting the reset pin to the low level
(2) System resetting by watchdog timer
(3) Having an interrupt source established at either INT0, INT1, INT2, INT4, or INT5
* INT0 and INT1 HOLD mode reset is available only when level detection is set.
(4) Having an interrupt source established at port 0
(5) Having an interrupt source established in the base timer circuit
ROM Correction Function
• Executes the correction program on detection of a match with the program counter value.
• Correction program area size: 128 bytes
Package Form
• QIP64E (14 × 14):
Lead-free type
• TQFP64J (7 × 7):
Lead-free type
• FLGA68K (6.0 × 6.0): Lead-free type
Development Tools
• Onchip debugger: LC87F5932A+TCB87 TypeA/TypeB


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