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AD5412ACPZ Folha de dados(PDF) 10 Page - Analog Devices |
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AD5412ACPZ Folha de dados(HTML) 10 Page - Analog Devices |
10 / 38 page AD5412/AD5422 Preliminary Technical Data Rev. PrF | Page 10 of 38 ABSOLUTE MAXIMUM RATINGS TA = 25°C unless otherwise noted. Transient currents of up to 100 mA do not cause SCR latch-up. Table 5. Parameter Rating AVDD to AGND, DGND −0.3V to 48V AVSS to AGND, DGND +0.3 V to −48 V AVDD to AVSS -0.3V to 60V DVCC to AGND, DGND −0.3 V to +7 V Digital Inputs to AGND, DGND −0.3 V to DVCC + 0.3 V or 7 V (whichever is less) Digital Outputs to AGND, DGND −0.3 V to DVCC + 0.3 V or 7V (whichever is less) REFIN/REFOUT to AGND, DGND −0.3 V to +7 V VOUT to AGND, DGND AVSS to AVDD IOUT to AGND, DGND −0.3V to AVDD AGND to DGND -0.3V to +0.3V Operating Temperature Range (TA) Industrial −40°C to +851°C Storage Temperature Range −65°C to +150°C Junction Temperature (TJ max) 125°C 24-Lead TSSOP Package θJA Thermal Impedance 42°C/W 40-Lead LFCSP Package θJA Thermal Impedance 28°C/W Power Dissipation (TJ max – TA)/ θJA Lead Temperature JEDEC Industry Standard Soldering J-STD-020 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION 1 Power dissipated on chip must be de-rated to keep junction temperature below 125°C. Assumption is max power dissipation condition is sourcing 24mA into Ground from AVDD with a 3mA on-chip current. |
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