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AD8226CRMZ-R7 Folha de dados(PDF) 9 Page - Analog Devices |
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AD8226CRMZ-R7 Folha de dados(HTML) 9 Page - Analog Devices |
9 / 16 page Preliminary Technical Data AD8226 Rev. PrA | Page 9 of 16 THEORY OF OPERATION A3 R2 2.47kΩ R1 2.47kΩ A1 A2 +VS –VS Q2 Q1 –IN +IN +VS –VS +VS –VS R3 50kΩ R4 50kΩ R5 50kΩ RB RB +VS –VS OUT REF NODE 1 NODE 2 RG UB +VS –VS +VS –VS NODE 4 NODE 3 R6 50kΩ DIFFERENCE AMPLIFIER STAGE GAIN STAGE Figure 3. Simplified Schematic ARCHITECTURE The AD8226 is based on the classic three op amp topology. This topology has two stages: a preamplifier to provide differential amplification, followed by a difference amplifier to remove the common-mode voltage. Figure 3 shows a simplified schematic of the AD8226. The first stage works as follows: in order to maintain a constant voltage across the Bias Resistor RB, Amplifier A1 must keep Node 3 a constant diode drop above the positive input voltage. Similarly, Amplifier A2 keeps Node 4 at a constant diode drop above the negative input voltage. Therefore a replica of the differential input voltage is placed across the gain setting resistor, RG. The current that flows across this resistance must also flow through the R1 and R2 resistors, creating a gained differential signal between the A2 and A1 outputs. Note that, in addition to a gained differential signal, the original common- mode signal, shifted a diode drop down, is also still present. The second stage is a difference amplifier, composed of A3 and four 50 kΩ resistors. The purpose of this stage is to remove the common-mode signal from the amplified differential signal. Because the input amplifiers employ a current feedback architecture, the gain-bandwidth product of the AD8226 increases with gain, resulting in a system that does not suffer from the expected bandwidth loss of voltage feedback architectures at higher gains. The transfer function of the AD8226 is VOUT = G(VIN+ − VIN−) + VREF where G R G kΩ 49.4 1 + = GAIN SELECTION Placing a resistor across the RG terminals sets the gain of the AD8226, which can be calculated by referring to Table 7 or by using the following gain equation: 1 kΩ 49.4 − = G RG Table 7. Gains Achieved Using 1% Resistors 1% Standard Table Value of R G (Ω) Calculated Gain 49.9 k 1.990 12.4 k 4.984 5.49 k 9.998 2.61 k 19.93 1.00 k 50.40 499 100.0 249 199.4 100 495.0 49.9 991.0 The AD8226 defaults to G = 1 when no gain resistor is used. The tolerance and gain drift of the RG resistor should be added to the AD8226’s specifications to determine the total gain accuracy of the system. When the gain resistor is not used, gain error and gain drift are minimal. INPUT PROTECTION The input terminals of the AD8226 have input protection that allows the input voltage to go beyond the rails without damaging the part. Maximum voltage is –Vs+40 V and minimum voltage is +Vs-40 V. For example: with ±15 V supplies, the part can withstand input voltages of ±25 V; with a 5 V single supply, maximum input voltage is 40 V and minimum input voltage is 35 V. |
Nº de peça semelhante - AD8226CRMZ-R7 |
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Descrição semelhante - AD8226CRMZ-R7 |
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