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CD74HC74 Folha de dados(PDF) 1 Page - Texas Instruments

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Nome de Peças CD74HC74
Descrição Electrónicos  Dual D Flip-Flop with Set and Reset Positive-Edge Trigger
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Fabricante Electrônico  TI [Texas Instruments]
Página de início  http://www.ti.com
Logo TI - Texas Instruments

CD74HC74 Folha de dados(HTML) 1 Page - Texas Instruments

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Data sheet acquired from Harris Semiconductor
SCHS124
Features
• Hysteresis on Clock Inputs for Improved Noise Immu-
nity and Increased Input Rise and Fall Times
• Asynchronous Set and Reset
• Complementary Outputs
• Buffered Inputs
• Typical fMAX = 50MHz at VCC = 5V, CL = 15pF,
TA = 25
oC
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
Description
The Harris CD54HC74, CD74HC74 and CD74HCT74 utilize
silicon gate CMOS technology to achieve operating speeds
equivalent to LSTTL parts. They exhibit the low power
consumption of standard CMOS integrated circuits, together
with the ability to drive 10 LSTTL loads.
This flip-flop has independent DATA, SET, RESET and
CLOCK inputs and Q and Q outputs. The logic level present
at the data input is transferred to the output during the
positive-going transition of the clock pulse. SET and RESET
are independent of the clock and are accomplished by a low
level at the appropriate input.
The 74HCT logic family is functionally as well as pin
compatible with the standard 74LS logic family.
Pinout
CD54HC74, CD74HC74, CD74HCT74
(PDIP, SOIC, CERDIP)
TOP VIEW
Ordering Information
PART NUMBER
TEMP. RANGE
(oC)
PACKAGE
PKG.
NO.
CD54HC74F
-55 to 125
14 Ld CERDIP
F14.3
CD74HC74E
-55 to 125
14 Ld PDIP
E14.3
CD74HCT74E
-55 to 125
14 Ld PDIP
E14.3
CD74HC74M
-55 to 125
14 Ld SOIC
M14.15
CD74HCT74M
-55 to 125
14 Ld SOIC
M14.15
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Die is available which meets all electrical specifications. Please
contact your local sales office or Harris customer service for
ordering information.
1R
1D
1CP
1S
1Q
1Q
GND
VCC
2R
2D
2CP
2S
2Q
2Q
1
2
3
4
5
6
7
14
13
12
11
10
9
8
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© Harris Corporation 1998
File Number
1476.1
CD54HC74, CD74HC74,
CD74HCT74
Dual D Flip-Flop with Set and Reset
Positive-Edge Trigger
[ /Title
(CD54H
C74,
CD74H
C74,
CD74H
CT74)
/Subject
(Dual D
Flip-
Flop
with Set
January 1998


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