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CDCR61APW Folha de dados(PDF) 4 Page - Texas Instruments |
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CDCR61APW Folha de dados(HTML) 4 Page - Texas Instruments |
4 / 10 page CDCR61A DIRECT RAMBUS ™ CLOCK GENERATOR – LITE SCAS626 – FEBRUARY 2000 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS† MIN TYP‡ MAX UNIT VO(X) Differential crossing-point output voltage See Figures 1 and 7 1.25 1.85 V VO(PP) Peak-to-peak output voltage swing, single ended VOH – VOL, See Figure 1 0.4 0.7 V VIK Input clamp voltage VDD = 3 V, II = –18 mA –1.2 V RI Input resistance XIN, XOUT VDD = 3.3 V, VI = VO >50 k Ω XOUT VDD = 3.3 V, VO = 2 V 27 mA IIH High-level input current S0 VDD = 3.6 V, VI = VDD 10 µA S1, S2 VDD = 3.6 V, VI = VDD 10 µA XOUT VDD = 3.3 V, VO = 0 V –5.7 mA IIL Low-level input current S0 VDD = 3.6 V, VI = 0 V –30 –100 µA S1, S2 VDD = 3.6 V, VI = 0 V –10 –50 µA See Figure 1 2.1 VOH High level output voltage CLK, CLKB VDD = min to max, IOH = –1 mA VDD– 0.1 V V VOH High-level output voltage VDD = 3 V, IOH = –16 mA 2.2 V LCLK VDDL = min to max, IOH = – 10 mA VDDL – 0.45 V VDDL See Figure 1 1 VOL Low level output voltage CLK, CLKB VDD = min to max, IOL = 1 mA 0.1 V VOL Low-level output voltage VDD = 3 V, IOL = 16 mA 0.5 V LCLK VDDL = min to max, IOL = 10 mA 0 0.45 VDD = 3.135 V, VO = 1 V –32 –52 CLK, CLKB VDD = 3.3 V, VO = 1.65 V –51 IOH High level output current VDD = 3.465 V, VO = 3.135 V –14.5 –21 mA IOH High-level output current VDDL = 1.7 V, VO = 0.5 V –11 –26 mA LCLK VDDL = 1.8 V, VO = 0.9 V –28 VDDL = 2.1 V, VO = 1.6 V –24.5 –35 VDD = 3.135 V, VO = 1.95 V 43 61.5 CLK, CLKB VDD = 3.3 V, VO = 1.65 V 65 IOL Low level output current VDD = 3.465 V, VO = 0.4 V 25.5 36 mA IOL Low-level output current VDDL = 1.7 V, VO = 1.2 V 11 27 mA LCLK VDDL = 1.8 V, VO = 0.9 V 30 VDDL = 2.1 V, VO = 0.5 V 28 38 rOH High-level dynamic output resistance§ ∆IO – 14.5 mA to ∆IO – 16.5 mA 12 25 40 Ω rOL Low-level dynamic output resistance§ ∆IO + 14.5 mA to ∆IO + 16.5 mA 12 17 40 Ω CO Output capacitance CLK, CLKB 3 pF CO Output capacitance LCLK 3 pF † VDD refers to any of the following; VDD, VDDL, and VDDP ‡ All typical values are at VDD = 3.3 V, VDDL = 1.8 V, TA = 25°C. § rO = ∆VO/∆IO. This is defined at the output terminals, not at the measurement point of Figure 1. |
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