SM76D Series 1.8 V

CMOS Clock Oscillators

March 2008

www.pletronics.com

425-776-1880

6

Mechanical:

Inches

mm

Label:

Laser marked on the ceramic

package metal cover

FR4 PCB Base:

Solder masked

All via holes tented on bottom

Copper Clad ½ oz. Typical

Gold plated 0.02 μinch (0.5 μm)

Pin 3 Ground plane is typical

Not to scale

A

0.324 +_0.003

8.23 +_0.07

B

0.356 +_0.005

9.04 +_0.13

C

0.135 +_0.005

3.43 +_0.13

0.062

1.57

0.050

1.27

0.050

1.27

0.059

1.50

0.020

0.51

0.040

1.02

0.200

5.08

Pad

Function

Note

1

Output

Enable/Disable

When this pad is not connected the oscillator shall operate.

When this pad is logic low the output will be inhibited (high impedance state.)

Recommend connecting this pad to V

2

Ground (GND)

3

Output

4

Supply Voltage

(V

Recommend connecting appropriate power supply bypass capacitors as close as

possible.

Layout and application information

For Optimum Jitter Performance, Pletronics recommends:

•

a ground plane under the device

•

no large transient signals (both current and voltage) should be routed under the device

•

do not layout near a large magnetic field such as a high frequency switching power supply

•

do not place near piezoelectric buzzers or mechanical fans.