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SN74ALVC3651PCB Folha de dados(PDF) 10 Page - Texas Instruments

Nome de Peças SN74ALVC3651PCB
Descrição Electrónicos  2048 횞 36 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY
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Fabricante Electrônico  TI [Texas Instruments]
Página de início  http://www.ti.com
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SN74ALVC3651PCB Folha de dados(HTML) 10 Page - Texas Instruments

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SN74ALVC3651
2048
× 36
SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY
SDMS025A – OCTOBER 1999 – REVISED DECEMBER 1999
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
almost-full flag
The AF flag of a FIFO is synchronized to the port clock that writes data to its array (CLKA). The almost-full state
is defined by the contents of register Y. This register is loaded with a preset value during a FIFO reset,
programmed from port A, or programmed serially (see
almost-empty flag and almost-full flag offset
programming). The AF flag is low when the number of words in the FIFO is greater than or equal to 2048 – Y).
The AF flag is high when the number of words in the FIFO is less than or equal to [2048 – (Y + 1)]. A data word
present in the FIFO output register has been read from memory.
Two low-to-high transitions of CLKA are required after a FIFO read for its AF flag to reflect the new level of fill.
Therefore, the AF flag of a FIFO containing [2048 – (Y + 1)] or less words remains low if two cycles of CLKA
have not elapsed since the read that reduced the number of words in memory to [2048 – (Y + 1)]. An AF flag
is set high by the second low-to-high transition of CLKA after the FIFO read that reduces the number of words
in memory to [2048 – (Y + 1)]. A low-to-high transition of CLKA begins the first synchronization cycle if it occurs
at time tsk(2), or greater, after the read that reduces the number of words in memory to [2048 – (Y + 1)].
Otherwise, the subsequent CLKA cycle can be the first synchronization cycle (see Figure 9).
synchronous retransmit
The synchronous-retransmit feature of the SN74ALVC3651 allows FIFO data to be read repeatedly, starting at
a user-selected position. The FIFO is first put into retransmit mode (RTM) to select a beginning word and prevent
ongoing FIFO write operations from destroying retransmit data. Data vectors with a minimum length of three
words can retransmit repeatedly, starting at the selected word. The FIFO can be taken out of RTM at any time
without affecting normal device operation.
The FIFO is put in retransmit mode by a low-to-high transition on CLKB when the RTM input is high and OR
is high. This rising CLKB edge marks the data present in the FIFO output register as the first retransmit data.
The FIFO goes out of retransmit mode when RTM goes low (see Figure 10).
When two or more reads have been done past the initial retransmit word, a retransmit is initiated by a low-to-high
transition on CLKB when the read-from-mark (RFM) input is high. This rising CLKB edge shifts the first
retransmit word to the FIFO output register and subsequent reads can begin immediately. Retransmit loops can
be done endlessly while the FIFO is in RTM. RFM must be low during the CLKB rising edge that takes the FIFO
out of retransmit mode.
When the FIFO is put into RTM, it operates with two read pointers. The current read pointer operates normally,
incrementing each time a new word is shifted to the FIFO output register and used by the OR and AE flags. The
shadow read pointer stores the SRAM location at the time the device is put into RTM and does not change until
the device is taken out of RTM. The shadow read pointer is used by the IR and AF flags. Data writes can proceed
while the FIFO is in RTM, but AF is set low by the write that stores (2048 – Y) words after the first retransmit
word. The IR flag is set low by the 2048th write after the first retransmit word.
When the FIFO is in RTM and RFM is high, a rising CLKB edge loads the current read pointer with the shadow
read-pointer value and the OR flag reflects the new level of fill immediately. If the retransmit changes the FIFO
status out of the almost-empty range, up to two CLKB rising edges after the retransmit cycle are needed to
switch AE high (see Figure 11). The rising CLKB edge that takes the FIFO out of retransmit mode shifts the read
pointer used by the IR and AF flags from the shadow to the current read pointer. If the change of read pointer
used by IR and AF should cause one or both flags to transition high, at least two CLKA synchronizing cycles
are needed before the flags reflect the change. A rising CLKA edge after the FIFO is taken out of retransmit
mode is the first synchronizing cycle of IR if it occurs at time tsk(1), or greater, after the rising CLKB edge (see
Figure 12). A rising CLKA edge after the FIFO is taken out of RTM is the first synchronizing cycle of AF if it occurs
at time tsk(2), or greater, after the rising CLKB edge (see Figure 14).


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