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TL16PIR552PH Folha de dados(PDF) 1 Page - Texas Instruments |
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TL16PIR552PH Folha de dados(HTML) 1 Page - Texas Instruments |
1 / 52 page TL16PIR552 DUAL UART WITH DUAL IrDA AND 1284 PARALLEL PORT SLLS222A – DECEMBER 1995 – REVISED AUGUST 1996 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Dual TL16C550C Universal Asynchronous Receiver/Transmitters (UARTs) D IEEE 1284 Bidirectional Parallel Data (PD) Port – Compatible With Standard Centronics Parallel Interface – Support for Parallel Protocols: Extended Capability Port (ECP) and Enhanced Parallel Port (EPP) – Data Path 16-Byte FIFO Buffer – Direct Memory Access (DMA) Transfer – Decompression of Run Length Encoded Data in ECP Reverse Mode – Direct Connection to Printer, No External Transceiver is Needed D Serial Ports Have Infrared Data Association (IrDA) Inputs and Outputs – 1200 bps to 115.2 kbps Data Rate D 16-Byte FIFOs Reduce CPU Interrupts D 12 mA Drive Current for All 1284 Control Terminals and Parallel Port Data Terminals D Programmable Auto Flow Control on the UARTs D Capable of Running With All Existing TL16C450 Software D After Reset, All Registers Are Identical to the TL16C450 Register Set D Up to 16-MHz Clock Rate for Up to 1-Mbaud Operation D In the TL16C450 Mode, Hold and Shift Registers Eliminate the Need for Precise Synchronization Between the CPU and Serial Data D Programmable Baud-Rate Generator Allows Division of Any Input Reference Clock by 1 to (216 – 1) and Generates an Internal 16 × Clock D Adds or Deletes Standard Asynchronous Communication Bits (Start, Stop, and Parity) to or From the Serial Data Stream D On-Board Prescaler With Programmable Divisor Values From 0 to 33 D Independent Control of Transmit, Receive, Line Status, and Data-Set Interrupts on Each Channel D Fully Programmable Serial-Interface Characteristics: – 5-, 6-, 7-, or 8-Bit Characters – Even-, Odd-, or No-Parity Bit Generation and Detection – 1-, 1 1/2-, or 2-Stop Bit Generation – Baud Generation (DC to 1 Mbit Per Second) D False Start-Bit Detection D Complete Status Reporting Capabilities D 3-State Output TTL Drive Capabilities for Bidirectional Data Bus and Control Bus D Line Break Generation and Detection D Internal Diagnostic Capabilities: – Loopback Controls for Communications Link-Fault Isolation – Break, Parity, Overrun, and Framing Error Simulation D Fully Prioritized Interrupt System Controls D Modem-Control Functions (CTS, RTS, DSR, DTR, RI, and DCD) D Available in 80-Pin Quad Flatpack (QFP) Package description The TL16PIR552 has a dual-channel universal asynchronous receiver/transmitter (UART). The UART is similar to the TL16C550C. The device serves two serial input/output ports simultaneously in microcomputer or microprocessor-based systems. Each channel performs serial-to-parallel conversion on data characters received from peripheral devices or modems and parallel-to-serial conversion on data characters transmitted by the CPU. The complete status of each channel of the dual UART can be read by the CPU at any time during functional operation. The information obtained includes the type and condition of the transfer operation being performed and the error condition. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1996, Texas Instruments Incorporated |
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