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ADXL346BCCZ-RL Folha de dados(PDF) 10 Page - Analog Devices

Nome de Peças ADXL346BCCZ-RL
Descrição Electrónicos  3-Axis, 짹2 g/짹4 g/짹8 g/짹16 g Ultralow Power Digital Accelerometer
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
Logo AD - Analog Devices

ADXL346BCCZ-RL Folha de dados(HTML) 10 Page - Analog Devices

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ADXL346
Preliminary Technical Data
Rev. PrC | Page 10 of 32
THEORY OF OPERATION
The ADXL346 is a complete 3-axis acceleration measurement
system with a selectable measurement range of ±2 g, ±4 g, ±8 g,
or ±16 g. It measures both dynamic acceleration resulting from
motion or shock and static acceleration, such as gravity, which
allows the device to be used as a tilt sensor.
The sensor is a polysilicon surface-micromachined structure
built on top of a silicon wafer. Polysilicon springs suspend the
structure over the surface of the wafer and provide a resistance
against forces due to applied acceleration.
Deflection of the structure is measured using differential capacitors
that consist of independent fixed plates and plates attached to the
moving mass. Acceleration deflects the proof mass and
unbalances the differential capacitor, resulting in a sensor output
whose amplitude is proportional to acceleration. Phase-sensitive
demodulation is used to determine the magnitude and polarity of
the acceleration.
POWER SEQUENCING
Power can be applied to VS or VDD I/O in any sequence without
damaging the ADXL346. All possible power-on modes are
summarized in Table 5. The interface voltage level is set with
the interface supply voltage, VDD I/O, which must be present to
ensure that the ADXL346 does not create a conflict on the
communication bus. For single-supply operation, VDD I/O can be
the same as the main supply, VS. In a dual-supply application,
however, VDD I/O can differ from VS to accommodate the desired
interface voltage, as long as VS is greater than or equal to VDDI/O.
After VS is applied, the device enters standby mode, where power
consumption is minimized and the device waits for VDD I/O to be
applied and for the command to enter measurement mode to be
received. (This command can be initiated by setting the measure
bit in the POWER_CTL register (Address 0x2D).) In addition, any
register can be written to or read from to configure the part while
the device is in standby mode. It is recommended to configure the
device in standby mode and then to enable measurement mode.
Clearing the measure bit returns the device to the standby mode.
Table 5. Power Sequencing
Condition
VS
VDDI/O
Description
Power Off
Off
Off
The device is completely off, but there is a
potential for a communication bus
conflict.
Bus Disabled
On
Off
The device is on in standby mode, but
communication is unavailable and will
create a conflict on the communication
bus. The duration of this state should be
minimized during power-up to prevent a
conflict.
Bus Enabled
Off
On
No functions are available, but the
device will not create a conflict on the
communication bus.
Standby or
Measurement
On
On
At power-up, the device is in standby
mode, awaiting a command to enter
measurement mode, and all sensor
functions are off. After the device is
instructed to enter measurement mode,
all sensor functions are available.
POWER SAVINGS
Power Modes
The ADXL346 automatically modulates its power consumption
in proportion to its output data rate, as outlined in Table 6. If
additional power savings is desired, a lower power mode is
available. In this mode, the internal sampling rate is reduced,
allowing for power savings in the 12.5 Hz to 400 Hz data rate
range at the expense of slightly greater noise. To enter low
power mode, set the LOW_POWER bit (Bit 4) in the BW_RATE
register (Address 0x2C). The current consumption in low power
mode is shown in Table 7 for cases where there is an advantage
to using low power mode. The current consumption values
shown in Table 6 and Table 7 are for a VS of 2.5 V.
Table 6. Typical Current Consumption vs. Data Rate
(TA = 25°C, VS = 2.5 V, VDD I/O = 1.8 V)
Output Data
Rate (Hz)
Bandwidth (Hz)
Rate Code
IDD (µA)
3200
1600
1111
140
1600
800
1110
90
800
400
1101
140
400
200
1100
140
200
100
1011
140
100
50
1010
140
50
25
1001
90
25
12.5
1000
60
12.5
6.25
0111
45
6.25
3.125
0110
35
Table 7. Typical Current Consumption vs. Data Rate, Low
Power Mode (TA = 25°C, VS = 2.5 V, VDD I/O = 1.8 V)
Output Data
Rate (Hz)
Bandwidth (Hz)
Rate Code
IDD (µA)
400
200
1100
90
200
100
1011
60
100
50
1010
45
50
25
1001
35
25
12.5
1000
35
12.5
6.25
0111
35


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