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ADRF6655 Folha de dados(PDF) 2 Page - Analog Devices

Nome de Peças ADRF6655
Descrição Electrónicos  Broadband Up/Downconverting Mixer with Integrated Fractional-N PLL and VCO
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
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ADRF6655 Folha de dados(HTML) 2 Page - Analog Devices

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ADRF6655
Rev. 0 | Page 2 of 44
TABLE OF CONTENTS
Features .............................................................................................. 1
 
General Description ......................................................................... 1
 
Functional Block Diagram .............................................................. 1
 
Revision History ............................................................................... 2
 
Specifications..................................................................................... 3
 
Timing Characteristics ................................................................ 5
 
Absolute Maximum Ratings............................................................ 6
 
ESD Caution.................................................................................. 6
 
Pin Configuration and Function Despcriptions .......................... 7
 
Typical Performance Characteristics ............................................. 9
 
Downconversion........................................................................... 9
 
Upconversion .............................................................................. 11
 
PLL Characteristic...................................................................... 12
 
Complimentary Cumulative Distribution Function (CCDF):
Downconversion, LO = 1100 MHz, RF = 900 MHz.............. 14
 
Complimentary Cumulative Distribution Function (CCDF):
Downconversion, LO = 1700 MHz, RF = 1900 MHz............ 15
 
Complimentary Cumulative Distribution Function (CCDF):
Upconversion Distribution ....................................................... 16
 
Circuit Description......................................................................... 17
 
PLL and VCO Block................................................................... 17
 
RF Mixer Block ........................................................................... 17
 
Digital Interfaces ........................................................................ 18
 
Analog Interfaces............................................................................ 19
 
Supply Connections ................................................................... 19
 
Synthesizer Connections ........................................................... 19
 
Output Matching and Biasing................................................... 19
 
Input Matching ........................................................................... 20
 
IP3SET Linearization Feature................................................... 21
 
CDAC Linearization Feature .................................................... 21
 
External LO Interface ................................................................ 21
 
Using an External VCO ............................................................. 22
 
ADRF6655 Control Software........................................................ 23
 
PLL Loop Filter Design ............................................................. 23
 
Register Structure ........................................................................... 24
 
Device Programming................................................................. 25
 
Initialization Sequence .............................................................. 25
 
Register 0—Integer Divide Control ......................................... 26
 
Register 1—Modulus Divide Control...................................... 27
 
Register 2—Fractional Divide Control.................................... 27
 
Register 3—Σ-Δ Modulator Dither Control........................... 28
 
Register 4—Charge Pump, PFD, and Reference
Path Control................................................................................ 29
 
Register 5—LO Path and Mixer Control................................. 31
 
Register 6—VCO Control and PLL Enables........................... 32
 
Register 7—External VCO Control ......................................... 33
 
Characterization Setups................................................................. 34
 
Evaluation Board Layout and Thermal Grounding................... 38
 
Outline Dimensions ....................................................................... 41
 
Ordering Guide .......................................................................... 41
 
REVISION HISTORY
2/10—Revision 0: Initial Version


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