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AM1707BZKBT3 Folha de dados(PDF) 1 Page - Texas Instruments |
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AM1707BZKBT3 Folha de dados(HTML) 1 Page - Texas Instruments |
1 / 198 page AM1707 www.ti.com SPRS637 – FEBRUARY 2010 AM1707 ARM Microprocessor Check for Samples: AM1707 1 AM1707 ARM Microprocessor 1.1 Features 123 With One Chip-Select • Applications • Programmable Real-Time Unit Subsystem – Industrial Automation (PRUSS) – Home Automation – Two Independent Programmable Realtime – Test and Measurement Unit (PRU) Cores – Portable Data Terminals • 32-Bit Load/Store RISC architecture – Eduational Consoles • 4K Byte instruction RAM per core – Power Protection Systems • 512 Bytes data RAM per core • 375/456-MHz ARM926EJ-S™ RISC Core • PRU Subsystem (PRUSS) can be disabled – 32-Bit and 16-Bit (Thumb®) Instructions via software to save power – Single Cycle MAC – Standard power management mechanism – ARM® Jazelle® Technology • Clock gating – EmbeddedICE-RT™ for Real-Time Debug • Entire subsystem under a single PSC • ARM9 Memory Architecture clock gating domain – 16K-Byte Instruction Cache – Dedicated interrupt controller – 16K-Byte Data Cache – Dedicated switched central resource – 8K-Byte RAM (Vector Table) • Multimedia Card (MMC)/Secure Digital (SD) – 64K-Byte ROM Card Interface with Secure Data I/O (SDIO) • Enhanced Direct-Memory-Access Controller 3 • Two Master/Slave Inter-Integrated Circuit (I2C (EDMA3): Bus™) – 2 Transfer Controllers • One Host-Port Interface (HPI) With 16-Bit-Wide – 32 Independent DMA Channels Muxed Address/Data Bus For High Bandwidth – 8 Quick DMA Channels • USB 1.1 OHCI (Host) With Integrated PHY (USB1) – Programmable Transfer Burst Size • USB 2.0 OTG Port With Integrated PHY (USB0) • 128K-Byte RAM Memory – USB 2.0 High-/Full-Speed Client • 3.3V LVCMOS IOs (except for USB interfaces) – USB 2.0 High-/Full-/Low-Speed Host • Two External Memory Interfaces: – End Point 0 (Control) – EMIFA – End Points 1,2,3,4 (Control, Bulk, Interrupt or • NOR (8-/16-Bit-Wide Data) ISOC) Rx and Tx • NAND (8-/16-Bit-Wide Data) • Three Multichannel Audio Serial Ports: • 16-Bit SDRAM With 128MB Address – Transmit/Receive Clocks up to 50 MHz Space – Six Clock Zones and 28 Serial Data Pins – EMIFB – Supports TDM, I2S, and Similar Formats • 32-Bit or 16-Bit SDRAM With 256MB Address Space – DIT-Capable (McASP2) • Three Configurable 16550 type UART Modules: – FIFO buffers for Transmit and Receive – UART0 With Modem Control Signals • 10/100 Mb/s Ethernet MAC (EMAC): – 16-byte FIFO – IEEE 802.3 Compliant (3.3-V I/O Only) – 16x or 13x Oversampling Option – RMII Media Independent Interface • LCD Controller – Management Data I/O (MDIO) Module • Two Serial Peripheral Interfaces (SPI) Each • Real-Time Clock With 32 KHz Oscillator and 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 ARM926EJ-S, EmbeddedICE-RT, ETM9, CoreSight are trademarks of ARM Limited. 3 ARM, Jazelle are registered trademarks of ARM Limited. ADVANCE INFORMATION concerns new products in the sampling Copyright © 2010, Texas Instruments Incorporated or preproduction phase of development. Characteristic data and other specifications are subject to change without notice. |
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