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SS6341CSTB Folha de dados(PDF) 10 Page - Silicon Standard Corp. |
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SS6341CSTB Folha de dados(HTML) 10 Page - Silicon Standard Corp. |
10 / 14 page www.SiliconStandard.com 10 of 14 SS6341 A multi-layer printed circuit board is recommended. Figure 10 shows the connections of the critical components in the converter. The CIN and COUT could each represent numerous physical capacitors. Dedicate one solid layer for a ground plane and make all critical component ground connections with vias to this layer. PWM Output Capacitors The load transient for the microprocessor core requires high quality capacitors to supply the high slew rate (di/dt) current demand. The ESR (equivalent series resistance) and ESL (equivalent series inductance) parameters determine the buck capacitor values, rather than actual capacitance. For a given transient load magnitude, the output voltage transient change due to the output capacitor can be found from the following equation: ∆ ∆ ∆ ∆ V ESR I ESL I T OUT OUT OUT = × + × where ∆IOUT is the transient load current step. + + + VOUT COUT Q1 +3.3VIN +5VIN LOUT GATE3 CIN Q2 Css SS GATE2 PGND LGATE PHASE UGATE OCSET VIN2 GND VCC +12V + + Q3 VOUT3 COUT3 Power Plane Layer Circuit Plane Layer Via Connection to Ground Plane + Q4 VOUT2 COUT2 Fig. 10 Printed circuit board power planes and islands Rev.2.01 6/26/2003 |
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