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74LVC1G58GM Folha de dados(PDF) 4 Page - NXP Semiconductors |
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74LVC1G58GM Folha de dados(HTML) 4 Page - NXP Semiconductors |
4 / 18 page 74LVC1G58_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 27 April 2009 4 of 18 NXP Semiconductors 74LVC1G58 Low-power configurable multiple function gate 7.1 Logic configurations Table 5. Function selection table Logic function Figure 2-input NAND see Figure 5 2-input NAND with both inputs inverted see Figure 8 2-input AND with inverted input see Figure 6 and 7 2-input NOR with inverted input see Figure 6 and 7 2-input OR see Figure 8 2-input OR with both inputs inverted see Figure 5 2-input XOR see Figure 9 Buffer see Figure 10 Inverter see Figure 11 Fig 5. 2-input NAND gate or 2-input OR with both inputs inverted Fig 6. 2-input AND gate with inverted B input or 2-input NOR gate with inverted C input 001aab688 B B6 Y C 1 5 2 4 3Y Y C B C VCC 001aab689 B B6 Y C 1 5 2 4 3Y Y C B C VCC Fig 7. 2-input AND gate with inverted C input or 2-input NOR gate with inverted A input Fig 8. 2-input OR gate or 2-input NAND gate with both inputs inverted 001aab690 A A 6 Y C 1 5 2 4 3Y Y C A C VCC 001aab691 A 6C 1 5 2 4 3Y VCC A Y C Y A C Fig 9. 2-input XOR gate Fig 10. Buffer 001aab692 B6 C 1 5 2 4 3Y VCC Y B C 001aab693 A A 6 Y 1 5 2 4 3Y VCC |
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Descrição semelhante - 74LVC1G58GM |
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