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ADC1010S Folha de dados(PDF) 2 Page - NXP Semiconductors

Nome de Peças ADC1010S
Descrição Electrónicos  Single 10-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs
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Fabricante Electrônico  NXP [NXP Semiconductors]
Página de início  http://www.nxp.com
Logo NXP - NXP Semiconductors

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ADC1010S_SER_1
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Preliminary data sheet
Rev. 01 — 9 April 2010
2 of 36
NXP Semiconductors
ADC1010S series
ADC1010S series; CMOS or LVDS DDR digital outputs
4.
Ordering information
5.
Block diagram
Table 1.
Ordering information
Type number
fs (Msps) Package
Name
Description
Version
ADC1010S125HN/C1 125
HVQFN40
plastic thermal enhanced very thin quad flat package;
no leads; 40 terminals; body 6
× 6 × 0.85 mm
SOT618-6
ADC1010S105HN/C1 105
HVQFN40
plastic thermal enhanced very thin quad flat package;
no leads; 40 terminals; body 6
× 6 × 0.85 mm
SOT618-6
ADC1010S080HN/C1 80
HVQFN40
plastic thermal enhanced very thin quad flat package;
no leads; 40 terminals; body 6
× 6 × 0.85 mm
SOT618-6
ADC1010S065HN/C1 65
HVQFN40
plastic thermal enhanced very thin quad flat package;
no leads; 40 terminals; body 6
× 6 × 0.85 mm
SOT618-6
Fig 1.
Block diagram
ADC1010S
SPI INTERFACE
OUTPUT
DRIVERS
OUTPUT
DRIVERS
SYSTEM
REFERENCE AND
POWER
MANAGEMENT
ERROR
CORRECTION AND
DIGITAL
PROCESSING
ADC CORE
10-BIT
PIPELINED
T/H
INPUT
STAGE
INP
OTR
CS
SDIO/ODS
SCLK/DFS
PWD
REFT
CMOS:
D9 to D0
or
LVDS/DDR:
D9_M to D0_M
D9_P to D0_P
INM
CLOCK INPUT
STAGE AND DUTY
CYCLE CONTROL
REFB
CLKM
CLKP
SENSE
VREF
VCM
005aaa134
OE
CMOS:
DAV
or
LVDS/DDR:
DAVP
DAVM


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