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CS4270-CZZ Folha de dados(PDF) 8 Page - Cirrus Logic |
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CS4270-CZZ Folha de dados(HTML) 8 Page - Cirrus Logic |
8 / 49 page 8 DS686PP1 CS4270 3. TYPICAL CONNECTION DIAGRAM Figure 1. CS4270 Typical Connection Diagram ) LJ (I2S/ CS / AD0 SDA / CDIN (M1) SCL / CCLK (M0) AINA AINB RST Power Down and Mode Settings (Control Port) AOUTA MUTEA AOUTB MUTEB Analog Conditioning & Mute LRCK SCLK MCLK Timing Logic & Clock SDIN ) S (M/ SDOUT Audio Data Processor DGND FILT+ AGND VQ VD VA +3.3 V to 5 V +3.3 V to 5 V CS4270 2. GND or VD 47 k Ω 5.1 Ω Analog Input Network 47 µF 0.1 µF 10 µF 0.1 µF 1 µF 0.1 µF 1 µF 0.1 µF If using separate supplies for VA and VD, 5.1 Ω resistor not needed. See "Grounding and Power Supply Decoupling." VLC +1.8 V to 5 V 2. 1. 1. 1. 3. 3. 3. Use pull-up resistors in Software Mode. In Hardware Mode, use pull-up or pull-down. See "Mode Selection & De-Emphasis." 2 k Ω 2 k Ω (see Figures 12 & 13) (see Figures 14 & 15) Use a 47 k Ω pull-down to select Slave Mode or 47 k Ω pull-up to VD to select Master Mode. See "Master/Slave Mode Selection." AD1 (MDIV2) AD2 (MDIV1) |
Nº de peça semelhante - CS4270-CZZ |
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Descrição semelhante - CS4270-CZZ |
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