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DAC5681IRGCT Folha de dados(PDF) 2 Page - Texas Instruments |
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DAC5681IRGCT Folha de dados(HTML) 2 Page - Texas Instruments |
2 / 47 page CLKIN CLKINC DCLKP 1.2V Reference EXTIO EXTLO BIASJ D0P D0N D15P D15N DCLKN SYNCP SYNCN IOUTA1 IOUTA2 16bit DAC Delay Lock Loop (DLL) FIFO Sync Disable Sync & Control 16 DLL Control Mode Control SYNC=’0->1' (transition) 16 Clock Distribution FDAC 4 16 B A TXEnable=’1' SW_Sync Sync Disable 13 2 DAC5681 SLLS864A – AUGUST 2007 – REVISED JANUARY 2009 ................................................................................................................................................. www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. FUNCTIONAL BLOCK DIAGRAM 2 Submit Documentation Feedback Copyright © 2007–2009, Texas Instruments Incorporated Product Folder Link(s): DAC5681 |
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Descrição semelhante - DAC5681IRGCT |
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