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TPD12S520DBTR Folha de dados(PDF) 6 Page - Texas Instruments

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Nome de Peças TPD12S520DBTR
Descrição Electrónicos  SINGLE-CHIP HDMI RECEIVER PORT PROTECTION AND INTERFACE DEVICE
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Fabricante Electrônico  TI [Texas Instruments]
Página de início  http://www.ti.com
Logo TI - Texas Instruments

TPD12S520DBTR Folha de dados(HTML) 6 Page - Texas Instruments

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ELECTRICAL CHARACTERISTICS
TPD12S520
SLVS640C – OCTOBER 2007 – REVISED APRIL 2009 .................................................................................................................................................... www.ti.com
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
I5V
Operating supply current
5V_SUPPLY = 5 V
1
5
µA
ILV
Bias supply current
LV_SUPPLY = 3.3 V
1
2
µA
OFF-state leakage current,
IOFF
LV_SUPPLY = 0 V
0.1
1
µA
level-shifting NFET
TMDS_[2:0]+/–,
TMDS_CK+/–,
Current conducted from output
CE_REMOTE_OUT,
IBACKDRIVE
pins to V_SUPPLY rails when
5V_SUPPLY < VCH_OUT
0.1
5
µA
DDC_DAT_OUT,
powered down
DDC_CLK_OUT,
HOTPLUG_DET_OUT
Voltage drop across level-shifting
VON
LV_SUPPLY = 2.5 V, VS = GND, IDS = 3 mA
75
95
140
mV
NFET when ON
Top diode
1
VF
Diode forward voltage
IF = 8 mA, TA = 25°C
(1)
V
Bottom diode
1
Pins 4, 7,10,13, 20–24, 27,
IEC
±8
30, 33(1)(2)
VESD
ESD withstand voltage
kV
Pins 1, 2, 16–19, 37(1)(3)
HBM
±2
Positive transients
9
Channel clamp voltage at 8-kV
VCL
TA = 25°C
(1) (3)
V
HBM ESD
Negative transients
–9
Positive transients
3
RDYN
Dynamic resistance
I = 1 A, TA = 25°C
(4)
Negative transients
1.5
ILEAK
TMDS channel leakage current
TA = 25°C
(1)
0.01
1
µA
CIN,
5V_SUPPLY = 5 V, Measured at 1 MHz,
TMDS channel input capacitance
0.8
1.0
pF
TMDS
VBIAS = 2.5 V
(1)
ΔCIN,
TMDS channel input capacitance
5V_SUPPLY = 5 V, Measured at 1 MHz,
0.05
pF
TMDS
matching
VBIAS = 2.5 V
(1) (5)
Mutual capacitance between
5V_SUPPLY = 0 V, Measured at 1 MHz,
CMUTUAL
0.07
pF
signal pin and adjacent signal pin
VBIAS = 2.5 V
(1)
DDC
3.5
4
5V_SUPPLY = 0 V,
Level-shifting input capacitance,
CIN
Measured at 100 KHz,
CEC
3.5
4
pF
capacitance to GND
VBIAS = 2.5 V(1)
HP
3.5
4
(1)
This parameter is specified by design.
(2)
Standard IEC 61000-4-2, CDISCHARGE= 150 pF, RDISCHARGE = 330 Ω, 5V_SUPPLY and LV_SUPPLY within recommended operating
conditions, GND = 0 V, and ESD_BYP (pin 37) and HOTPLUG_DET_OUT (pin 20) each bypassed with a 0.1-
µF ceramic capacitor
connected to GND.
(3)
HBM per MIL-STD-883, Method 3015, CDISCHARGE = 100 pF, RDISCHARGE = 1.5 kΩ, 5V_SUPPLY and LV_SUPPLY within recommended
operating conditions, GND = 0 V, and ESD_BYP (pin 37) and HOTPLUG_DET_OUT (pin 20) each bypassed with a 0.1-
µF ceramic
capacitor connected to GND.
(4)
These measurements performed with no external capacitor on ESD_BYP.
(5)
Intrapair matching, each TMDS pair (i.e., D+, D–)
6
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Copyright © 2007–2009, Texas Instruments Incorporated
Product Folder Link(s): TPD12S520


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