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AMIS30621C6217RG Folha de dados(PDF) 5 Page - ON Semiconductor

Nome de Peças AMIS30621C6217RG
Descrição Electrónicos  Micro-Stepping Motor Driver
Download  59 Pages
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Fabricante Electrônico  ONSEMI [ON Semiconductor]
Página de início  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

AMIS30621C6217RG Folha de dados(HTML) 5 Page - ON Semiconductor

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AMIS−30621
http://onsemi.com
5
PACKAGE THERMAL RESISTANCE
The AMIS−30621 is available in SOIC−20 and optimized
NQFP32 packages. For cooling optimizations, the NQFP
has an exposed thermal pad which has to be soldered to the
PCB ground plane. The ground plane needs thermal vias to
conduct the head to the bottom layer. Figures 3 and 4 give
examples for good power distribution solutions.
For precise thermal cooling calculations the major
thermal resistances of the devices are given. The thermal
media to which the power of the devices has to be given are:
Static environmental air (via the case)
PCB board copper area (via the device pins and
exposed pad)
The thermal resistances are presented in Table 5: DC
Parameters.
The major thermal resistances of the device are the Rth
from the junction to the ambient (Rthja) and the overall Rth
from the junction to the leads (Rthjp).
The NQFP device is designed to provide superior thermal
performance. Using an exposed die pad on the bottom
surface of the package, is mainly contributing to this
performance. In order to take full advantage of the exposed
pad, it is most important that the PCB has features to conduct
heat away from the package. A thermal grounded pad with
thermal vias can achieve this.
In below table, one can find the values for the Rthja and
Rthjp, simulated according to the JESD−51standard:
Package
Rth
Junction−to−Leads and
Exposed Pad (Rthjp)
Rth
Junction−to−Leads
(Rthjp)
Rth
Junction−to−Ambient
Rthja 1S0P
Rth
Junction−to−Ambient
Rthja 2S2P
SOIC−20
19
62
39
NQFP−32
0.95
60
30
The Rthja for 2S2P is simulated conform to JESD−51 as
follows:
A 4−layer printed circuit board with inner power planes
and outer (top and bottom) signal layers is used
Board thickness is 1.46 mm (FR4 PCB material)
The 2 signal layers: 70 mm thick copper with an area of
5500 mm2 copper and 20% conductivity
The 2 power internal planes: 36 mm thick copper with
an area of 5500 mm2 copper and 90% conductivity
The Rthja for 1S0P is simulated conform to JESD−51 as
follows:
A 1−layer printed circuit board with only 1 layer
Board thickness is 1.46 mm (FR4 PCB material)
The layer has a thickness of 70 mm copper with an area
of 5500 mm2 copper and 20% conductivity
NQFP−32
Figure 3. Example of SOIC−20 PCB Ground Plane
Layout (Preferred Layout at Top and Bottom)
Figure 4. Example of NQFP−32 PCB Ground Plane
Layout (Preferred Layout at Top and Bottom)


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