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CDCLVC11XX Folha de dados(PDF) 7 Page - Texas Instruments

Nome de Peças CDCLVC11XX
Descrição Electrónicos  3.3 V and 2.5 V LVCMOS High-Performance Clock Buffer Family
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Fabricante Electrônico  TI [Texas Instruments]
Página de início  http://www.ti.com
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CDCLVC11XX Folha de dados(HTML) 7 Page - Texas Instruments

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background image
tr
Yn
80 % V OH -V OL
CLKIN
tf
20 % V OH -V OL
VOH
V OL
tPLH
V DD / 2
Y n
V DD / 2
CLKIN
tPHL
Note : tsk (p) = | tPLH – t PHL |
CDCLVC11xx
www.ti.com
SCAS895 – MAY 2010
PARAMETERS MEASUREMENT INFORMATION (continued)
Figure 6. Pulse Skew tsk(p) and Propagation Delay
Figure 7. Rise/Fall Times tr/tf
tPLH/tPHL
TYPICAL CHARACTERISTICS
Power Consideration
The following power consideration refers to the device-consumed power consumption only. The device power
consumption is the sum of static power and dynamic power. The dynamic power usage consists of two
components:
1. Power used by the device as it switches states.
2. Power required to charge any output load.
The output load can be capacitive only or capacitive and resistive. The following formula and the power graphs in
Figure 8 and Figure 9 can be used to obtain the power consumption of the device:
Pdev = Pstat + n (Pdyn + PCload)
Pstat = VDD x IDD
Pdyn + PCload = see Figure 8 and Figure 9
where:
VDD = Supply voltage (3.3 V or 2.5 V)
IDD = Static device current (typ 6 mA for VDD = 3.3 V; typ 3 mA for VDD = 2.5 V)
n = Number of switching output pins
Example for Device Power Consumption for CDCLVC1104: 4 outputs are switching, f = 120 MHz, VDD = 3.3 V
and Cload = 2 pF per output:
Pdev = Pstat + n (Pdyn + PCload) = 19.8 mW + 40 mW = 59.8 mW
Pstat = VDD x IDD = 6 mA x 3.3 V = 19.8 mW
n (Pdyn + PCload) = 4 x 10 mW = 40 mW
NOTE
For dimensioning the power supply, the total power consumption needs to be considered.
The total power consumption is the sum of the device power consumption and the power
consumption of the load.
Copyright © 2010, Texas Instruments Incorporated
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