Os motores de busca de Datasheet de Componentes eletrônicos |
|
CDCEL925PW Folha de dados(PDF) 3 Page - Texas Instruments |
|
|
CDCEL925PW Folha de dados(HTML) 3 Page - Texas Instruments |
3 / 27 page EEPROM Xin/CLK Xout VDD GND Vctr VDDOUT VCXO XO LVCMOS Y2 Y1 Y3 LV CMOS Pdiv1 10-Bit Y4 Y5 LV CMOS Pdiv5 7-Bit Pdiv4 7-Bit LV CMOS LV CMOS Pdiv3 7-Bit Pdiv2 7-Bit LV CMOS Programming and SDA/SCL Register InputClock PLL Bypass PLL 1 WithSSC PLL Bypass PLL 2 WithSSC S0 S1/SDA S2/SCL CDCE925 CDCEL925 www.ti.com SCAS847F – JULY 2007 – REVISED MARCH 2010 FUNCTIONAL BLOCK DIAGRAM for CDCE925, CDCEL925 ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VALUE UNIT VDD Supply voltage range –0.5 to 2.5 V VI Input voltage range(2) (3) –0.5 to VDD + 0.5 V VO Output voltage range(2) –0.5 to VDD + 0.5 V II Input current (VI < 0, VI > VDD) 20 mA IO Continuous output current 50 mA Tstg Storage temperature range –65 to 150 °C TJ Maximum junction temperature 125 °C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. (2) The input and output negative voltage ratings may be exceeded if the input and output clamp–current ratings are observed. (3) SDA and SCL can go up to 3.6V as stated in the Recommended Operating Conditions table. PACKAGE THERMAL RESISTANCE for TSSOP (PW) PACKAGE (1) over operating free-air temperature range (unless otherwise noted) AIRFLOW TSSOP16 PARAMETER (lfm) °C/W 0 101 150 85 TJA Thermal Resistance Junction to Ambient 200 84 250 82 500 74 TJC Thermal Resistance Junction to Case — 42 TJB Thermal Resistance Junction to Board — 64 RqJT Thermal Resistance Junction to Top — 1.0 RqJB Thermal Resistance Junction to Bottom — 58 (1) The package thermal impedance is calculated in accordance with JESD 51 and JEDEC2S2P (high-k board). Copyright © 2007–2010, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): CDCE925 CDCEL925 |
Nº de peça semelhante - CDCEL925PW |
|
Descrição semelhante - CDCEL925PW |
|
|
Ligação URL |
Privacy Policy |
ALLDATASHEETPT.COM |
ALLDATASHEET é útil para você? [ DONATE ] |
Sobre Alldatasheet | Publicidade | Contato conosco | Privacy Policy | roca de Link | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |