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SN74AUC1G79 Folha de dados(PDF) 1 Page - Texas Instruments |
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SN74AUC1G79 Folha de dados(HTML) 1 Page - Texas Instruments |
1 / 12 page www.ti.com FEATURES DBVPACKAGE (TOP VIEW) 3 2 4 5 1 D V CC Q CLK GND Seemechanicaldrawingsfordimensions. NC – Nointernalconnection V CC 3 2 4 5 1 D Q CLK GND DCKPACKAGE (TOP VIEW) V CC A GND Y B 1 4 2 3 5 YZP PACKAGE (BOTTOMVIEW) DRY PACKAGE (TOP VIEW) CLK D 6 4 2 3 GND Q V CC 1 5 NC PR EVIE W DESCRIPTION/ORDERING INFORMATION SN74AUC1G79 SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP SCES387K – MARCH 2002 – REVISED APRIL 2007 • Available in the Texas Instruments • Low Power Consumption, 10-µA Max I CC NanoFree™ Package • ±8-mA Output Drive at 1.8 V • Optimized for 1.8-V Operation and Is 3.6-V I/O • Latch-Up Performance Exceeds 100 mA Per Tolerant to Support Mixed-Mode Signal JESD 78, Class II Operation • ESD Protection Exceeds JESD 22 • I off Supports Partial-Power-Down Mode – 2000-V Human-Body Model (A114-A) Operation – 200-V Machine Model (A115-A) • Sub-1-V Operable – 1000-V Charged-Device Model (C101) • Max t pd of 1.9 ns at 1.8 V This single positive-edge-triggered D-type flip-flop is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation. When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. ORDERING INFORMATION ORDERABLE PART TA PACKAGE(1)(2) TOP-SIDE MARKING(3) NUMBER NanoFree™ – WCSP (DSBGA) Reel of 3000 SN74AUC1G79YZPR _ _ _UR_ 0.23-mm Large Bump – YZP (Pb-free) SON – DRY Reel of 5000 SN74AUC1G79DRYR PREVIEW –40 °C to 85°C SOT (SOT-23) – DBV Reel of 3000 SN74AUC1G79DBVR U79_ SOT (SC-70) – DCK Reel of 3000 SN74AUC1G79DCKR UR_ (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. (2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. (3) DBV/DCK/DRY: The actual top-side marking has one additional character that designates the assembly/test site. YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoFree is a trademark of Texas Instruments. UNLESS OTHERWISE NOTED this document contains Copyright © 2002–2007, Texas Instruments Incorporated PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
Nº de peça semelhante - SN74AUC1G79 |
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Descrição semelhante - SN74AUC1G79 |
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