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KM416V4000C Folha de dados(PDF) 9 Page - Samsung semiconductor |
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KM416V4000C Folha de dados(HTML) 9 Page - Samsung semiconductor |
9 / 9 page KM416V4000C, KM416V4100C CMOS DRAM tASC, tCAH are referenced to the earlier CAS falling edge. tCP is specified from the last CAS rising edge in the previous cycle to the first CAS falling edge in the next cycle. tCWD is referenced to the later CAS falling edge at word read-modify-write cycle. tCWL is specified from W falling edge to the earlier CAS rising edge. tCSR is referenced to earlier CAS falling before RAS transition low. tCHR is referenced to the later CAS rising high after RAS transition low. tDS is specified for the earlier CAS falling edge and tDH is specified by the later CAS falling edge. If tRASS ≥100us, then RAS precharge time must use tRPS instead of tRP. For RAS-only-Refresh and Burst CAS-before-RAS refresh mode, 4096 cycles(4K/8K) of burst refresh must be executed within 64ms before and after self refresh, in order to meet refresh specification. For distributed CAS-before-RAS with 15.6us interval, CBR refresh should be executed with in 15.6us immediately before and after self refresh in order to meet refresh specification. tCSR tCHR RAS LCAS UCAS tDS tDH LCAS UCAS DQ0 ~ DQ15 Din 21. 20. 19. 15. 14. 13. 18. 17. 16. 22. |
Nº de peça semelhante - KM416V4000C |
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Descrição semelhante - KM416V4000C |
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