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KM416V4104C Folha de dados(PDF) 1 Page - Samsung semiconductor

Nome de Peças KM416V4104C
Descrição Electrónicos  4M x 16bit CMOS Dynamic RAM with Extended Data Out
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Fabricante Electrônico  SAMSUNG [Samsung semiconductor]
Página de início  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

KM416V4104C Folha de dados(HTML) 1 Page - Samsung semiconductor

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KM416V4004C,KM416V4104C
CMOS DRAM
This is a family of 4,194,304 x 16 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random
access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -5 or -6), power consumption(Normal
or Low power) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh
capabilities. Furthermore, Self-refresh operation is available in L-version. This 4Mx16 EDO Mode DRAM family is fabricated using Sam-
sung
′s advanced CMOS process to realize high band-width, low power consumption and high reliability.
• Part Identification
- KM416V4004C/C-L(3.3V, 8K Ref.)
- KM416V4104C/C-L(3.3V, 4K Ref.)
• Extended Data Out Mode operation
• 2 CAS Byte/Word Read/Write operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Fast parallel test mode capability
• Self-refresh capability (L-ver only)
• LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in Plastic TSOP(II) packages
• +3.3V
±0.3V power supply
Control
Clocks
Lower
Data out
Buffer
RAS
UCAS
LCAS
W
Vcc
Vss
DQ0
to
DQ7
A0~A12
(A0~A11)*1
A0~A8
(A0~A9)*1
Memory Array
4,194,304 x 16
Cells
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.
4M x 16bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Note) *1 : 4K Refresh
• Refresh Cycles
Part
NO.
Refresh
cycle
Refresh time
Normal
L-ver
KM416V4004C*
8K
64ms
128ms
KM416V4104C
4K
Unit : mW
Upper
Data in
Buffer
Upper
Data out
Buffer
Lower
Data in
Buffer
DQ8
to
DQ15
OE
* Access mode & RAS only refresh mode
: 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.)
CAS-before-RAS & Hidden refresh mode
: 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.)
• Active Power Dissipation
Speed
8K
4K
-45
324
468
-5
288
432
-6
252
396
• Performance Range
Speed
tRAC
tCAC
tRC
tHPC
-45
45ns
12ns
74ns
17ns
-5
50ns
15ns
84ns
20ns
-6
60ns
17ns
104ns
25ns
Row Decoder
Column Decoder
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer


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