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SL3S1203FTB0 Folha de dados(PDF) 11 Page - NXP Semiconductors |
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SL3S1203FTB0 Folha de dados(HTML) 11 Page - NXP Semiconductors |
11 / 22 page SL3S1203_1213_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product short data sheet PUBLIC Rev. 3.2 — 9 November 2010 198732 11 of 22 NXP Semiconductors SL3S1203_1213 UCODE G2iL and G2iL+ In addition to the three memory banks one configuration word to handle the G2iL specific features is available at EPC bank 01 address 200h. Memory pages (16 bit words) pre-programmed to zero will not execute an erase cycle before writing data to it. This approach accelerates initialization of the chip and enables faster programming of the memory. 12. Limiting values [1] Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any conditions other than those described in the Operating Conditions and Electrical Characteristics section of this specification is not implied. [2] This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maxima. [3] For ESD measurement, the die chip has been mounted into a CDIP20 package. Table 9. Limiting values[1][2] In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to RFN Symbol Parameter Conditions Min Max Unit Bare die and SOT886 limitations Tstg storage temperature −55 +125 °C Tamb ambient temperature −40 +85 °C VESD electrostatic discharge voltage Human body model [3] - ± 2kV Pad limitations Vi input voltage absolute limits, VDD-OUT pad −0.5 +2.5 V Io output current absolute limits input/output current, VDD-OUT pad −0.5 +0.5 mA Pi input power maximum power dissipation, RFP pad -100 mW |
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