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FAN3278T Folha de dados(PDF) 6 Page - Fairchild Semiconductor |
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FAN3278T Folha de dados(HTML) 6 Page - Fairchild Semiconductor |
6 / 18 page © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN3213 / FAN3214 • Rev. 1.0.2 6 Electrical Characteristics Unless otherwise noted, VDD=12V, TJ=-40°C to +125°C. Currents are defined as positive into the device and negative out of the device. Symbol Parameter Conditions Min. Typ. Max. Unit Supply VDD Operating Range 4.5 18.0 V IDD Supply Current, Inputs Not Connected 0.70 0.95 mA VON Turn-On Voltage INA = VDD, INB = 0V 3.5 3.9 4.3 V VOFF Turn-Off Voltage INA = VDD, INB = 0V 3.3 3.7 4.1 V Inputs VIL_T INx Logic Low Threshold 0.8 1.2 V VIH_T INx Logic High Threshold 1.6 2.0 V IIN+ Non-Inverting Input IN from 0 to VDD -1.5 175.0 µA IIN- Inverting Input IN from 0 to VDD -175.0 1.5 µA VHYS_T TTL Logic Hysteresis Voltage 0.2 0.4 0.8 V Output ISINK OUT Current, Mid-Voltage, Sinking (8) OUTx at VDD/2, CLOAD=0.22µF, f=1kHz 4.3 A ISOURCE OUT Current, Mid-Voltage, Sourcing (8) OUTx at VDD/2, CLOAD=0.22µF, f=1kHz -2.8 A IPK_SINK OUT Current, Peak, Sinking (8) CLOAD=0.22µF, f=1kHz 5 A IPK_SOURCE OUT Current, Peak, Sourcing (8) CLOAD=0.22µF, f=1kHz -5 A tRISE Output Rise Time (9) CLOAD=2200pF 12 20 ns tFALL Output Fall Time (9) CLOAD=2200pF 9 17 ns tD1, tD2 Output Propagation Delay, TTL Inputs (9) 0 - 5VIN, 1V/ns Slew Rate 9 17 29 ns Propagation Matching Between Channels INA=INB, OUTA and OUTB at 50% Point 2 4 ns IRVS Output Reverse Current Withstand (8) 500 mA Notes: 8. Not tested in production. 9. See Timing Diagrams of Figure 6 and Figure 7. Figure 6. Non-Inverting Timing Diagram Figure 7. Inverting Timing Diagram |
Nº de peça semelhante - FAN3278T |
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Descrição semelhante - FAN3278T |
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