STK15C88

Document Number: 001-50593 Rev. *C

Page 3 of 17

Pin Configurations

Figure 1. Pin Diagram - 28-pin SOIC

Table 1. Pin Definitions - 28-pin SOIC

Pin Name

Alt

I/O Type

Description

Input

Address Inputs. Used to select one of the 32,768 bytes of the nvSRAM.

Input or

Output

Bidirectional Data I/O lines. Used as input or output lines depending on operation.

WE

W

Input

Write Enable Input, Active LOW. When the chip is enabled and WE is LOW, data on the

I/O pins is written to the specific address location.

CE

E

Input

Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the

chip.

OE

G

Input

Output Enable, Active LOW. The active LOW OE input enables the data output buffers

during read cycles. Deasserting OE HIGH causes the I/O pins to tristate.

Ground

Ground for the Device. The device is connected to ground of the system.

Power Supply Power Supply Inputs to the Device.

[+] Feedback