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SM320F2808-EP Folha de dados(PDF) 9 Page - Texas Instruments |
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SM320F2808-EP Folha de dados(HTML) 9 Page - Texas Instruments |
9 / 118 page www.ti.com 1 Features SM320F2808-EP, SM320F2806-EP SM320F2801-EP Digital Signal Processors SGLS316A – MARCH 2006 – REVISED FEBRUARY 2007 • Peripheral Interrupt Expansion (PIE) Block • Controlled Baseline That Supports All 43 Peripheral Interrupts – One Assembly/Test/Fabrication Site • 128-Bit Security Key/Lock • Enhanced Diminishing Manufacturing Sources – Protects Flash/OTP/L0/L1 Blocks (DMS) Support – Prevents Firmware Reverse Engineering • Enhanced Product-Change Notification • Enhanced Control Peripherals • Qualification Pedigree(1) – Up to 16 PWM Outputs • High-Performance Static CMOS Technology – Up to Four HRPWM Outputs With 150 ps – 100 MHz (10-ns Cycle Time) MEP Resolution – Low-Power (1.8-V Core, 3.3-V I/O) Design – Up to Four Capture Inputs – 3.3-V Flash Voltage – Up to Two Quadrature Encoder Interfaces • JTAG Boundary Scan Support – Up to Six 32-bit Timers • High-Performance 32-Bit CPU (TMS320C28x) – Up to Six 16-bit Timers – 16 x 16 and 32 x 32 MAC Operations • Three 32-Bit CPU Timers – 16 x 16 Dual MAC • Serial Port Peripherals – Harvard Bus Architecture – Up to Four Serial Peripheral Interface (SPI) – Atomic Operations Modules – Fast Interrupt Response and Processing – Up to Two Serial Communications Interface – Unified Memory Programming Model (SCI), Standard UART Modules – Code-Efficient (in C/C++ and Assembly) – Up to Two Enhanced Controller Area Network (eCAN) Modules • On-Chip Memory – One Inter-Integrated-Circuit (I2C) Bus – F2808: 64K X 16 Flash, 18K X 16 SARAM F2806: 32K X 16 Flash, 10K X 16 SARAM • 12-Bit ADC, 16 Channels F2801: 16K X 16 Flash, 6K X 16 SARAM – 2 x 8 Channel Input Multiplexer 9501: 16K X 16 Flash, 6K X 16 SARAM – Two Sample-and-Hold – 1K x 16 OTP ROM – Single/Simultaneous Conversions • Boot ROM (4K x 16) – Fast Conversion Rate: 160 ns/6.25 MSPS – With Software Boot Modes (via SCI, SPI, – Internal or External Reference CAN, I2C, and Parallel I/O) • Up to 35 Individually Programmable, – Standard Math Tables Multiplexed General-Purpose Input/Output • Clock and System Control (GPIO) Pins With Input Filtering – Dynamic PLL Ratio Changes Supported • Advanced Emulation Features – On-Chip Oscillator – Analysis and Breakpoint Functions – Clock-Fail-Detect Mode – Real-Time Debug via Hardware – Watchdog Timer Module • Low-Power Modes and Power Savings • Any GPIO A Pin Can Be Connected to One of the Three External Core Interrupts – IDLE, STANDBY, HALT Modes Supported – Disable Individual Peripheral Clocks (1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an • Package Options extended temperature range. This includes, but is not limited – Thin Quad Flatpack (PZ) to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, – MicroStar BGA™ (GGM, ZGM) electromigration, bond intermetallic life, and mold compound • Temperature Options: life. Such qualification testing should not be viewed as justifying use of this component beyond specified – M: -55 °C to 125°C (PZ) performance and environmental limits. MicroStar BGA, TMS320C28x, MicroStar, C28x, TMS320C2000, DSP/BIOS, Code Composer Studio, TMS320 are trademarks of Texas Instruments. eZdsp, XDS510USB are trademarks of Spectrum Digital. PRODUCTION DATA information is current as of publication date. Copyright © 2006–2007, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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