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BD4155FV Folha de dados(PDF) 8 Page - Rohm

Nome de Peças BD4155FV
Descrição Electrónicos  Power Switch IC for ExpressCard
Download  17 Pages
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Fabricante Electrônico  ROHM [Rohm]
Página de início  http://www.rohm.com
Logo ROHM - Rohm

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BD4155FV
Technical Note
8/16
www.rohm.com
2010.04 - Rev.B
© 2010 ROHM Co., Ltd. All rights reserved.
Description of block operation
V3_IN, V15_IN, and V3AUX_IN
These are the input terminals for each channel of a 3ch switch. V3_IN and V15_IN terminals have two pins each, which
should be short-circuited on the pc board with a thick conductor. A large current runs through these three terminals :
(V3_IN: 1.35A; V3AUX_IN: 0.275 A; and V15_IN: 0.625 A). In order to lower the output impedance of the connected power
supply, it is recommended that ceramic capacitors (with B-type characteristics or better) be provided between these
terminals and the ground. Specifically, the capacitors should be on the order of 1 μF between V3_IN and GND, and between
V15_IN and GND; and on the order of 0.1 μF between V3AUX_IN and GND.
V3, V15, and V3AUX
These are the output terminals for each switch. The V3 and V15 terminals have two pins each, which should be
short-circuited on the PC board and connected to an ExpressCard connector with a thick conductor, as short as possible.
In order to stabilize the output, it is recommended that ceramic capacitors (with B-type characteristics or better) be provided
between these terminals and the ground. Specifically, the capacitors should be on the order of 10 μF between V3 and GND,
and between V15 and GND; and on the order of 1 μF between V3AUX and GND.
CPPE#
This pin is used to find whether or not a PCI-Express signal compatible card is present. Turns to “High” level with an input
of 2.0 volts or higher, which means that no card is provided, while it turns to “Low” level when the input is lowered to 0.8 volts
or less, which means that a card is provided. Controls the ON/OFF, switch selecting the proper mode based on the status
of the system.
Pull up resistance (100kΩ~200kΩ) is built into, so the number of components is reduced.
CPUSB#
This pin is used to find whether or not a USB2.0 signal compatible card is present. Turns to “High” level with an input of 2.0
volts or higher, which means that no card is provided, while it turns to “Low” level when the input is lowered to 0.8 volts or
less, which means that a card is provided. Controls the ON/OFF switch, selecting the proper mode based on the system
status.
Pull up resistance (100kΩ~200kΩ) is built into, so the number of components is reduced.
SYSR
These pins are used to detect the system status. Turns to “High” level with an input of 2.0 volts or higher, which means that
the system is activated, while it turns to “Low” level when the input is lowered to 0.8 volts or less, which means that the
system is on standby.
PLT_RST#, EC_RST#
These pins are used to control the reset signal (PERST#) to a card from the system side. (Also referred to as “SysReset#”
by PCMCIA.) Turns to “High” level with an input of 2.0 volts or higher, and sets PERST# to “High” AND with a “Power
Good” output. Turns to “Low” level and sets PERST# to “Low” when the input falls to 0.8 volts or less.
PERST#
This pin is used to send a reset signal to a PCI-Express compatible card. Reset status is determined by the outputs,
PLT_RST#, EC_RST#, CPPE# system status. Turns to “High” level and activates the PCI-Express compatible card only if
each output is within the “Power Good” threshold, with the card inserted and PLT_RST#, EC_RST# turned to “High” level.
EC_CLKEN#, EC_CLKREQ#
These pins are used to control the enable signal (PLL_CLKREQ#) to the reference clock. Turns to “High” level and set
PLL_CLKREQ# to “High” when the input rise to 2.0 volts or higher. Turns to “Low” level with an input of 0.8 volts or less, and
sets PLL_CLKREQ# to “Low” or with a inverting “Power Good” output.
PLL_CLKREQ#
This pin is used to send an enable signal to the reference clock. Activation status is determined by the outputs, EC_CLKEN#,
EC_CLKREQ#, CPPE# system status. Turns to “Low” level and activates the reference clock PLL only if each output is within
the “Power Good” threshold, with the card kept inserted, and EC_CLKEN#, EC_CLKREQ# turned to “Low”level.


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