74LVC2G08

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© NXP B.V. 2010. All rights reserved.

Product data sheet

Rev. 9 — 20 October 2010

2 of 21

NXP Semiconductors

74LVC2G08

Dual 2-input AND gate

3.

Ordering information

4.

Marking

[1]

The pin 1 indicator is located on the lower left corner of the device, below the marking code.

Table 1.

Ordering information

Type number

Package

Temperature range

Name

Description

Version

74LVC2G08DP

−40 °C to +125 °C

TSSOP8

plastic thin shrink small outline package; 8 leads;

body width 3 mm; lead length 0.5 mm

SOT505-2

74LVC2G08DC

−40 °C to +125 °C

VSSOP8

plastic very thin shrink small outline package; 8 leads;

body width 2.3 mm

SOT765-1

74LVC2G08GT

−40 °C to +125 °C

XSON8

plastic extremely thin small outline package; no leads;

8 terminals; body 1

× 1.95 × 0.5 mm

SOT833-1

74LVC2G08GF

−40 °C to +125 °C

XSON8

extremely thin small outline package; no leads;

8 terminals; body 1.35

× 1 × 0.5 mm

SOT1089

74LVC2G08GD

−40 °C to +125 °C

XSON8U

plastic extremely thin small outline package; no leads;

8 terminals; UTLP based; body 3

× 2 × 0.5 mm

SOT996-2

74LVC2G08GM

−40 °C to +125 °C

XQFN8U

plastic extremely thin quad flat package; no leads;

8 terminals; UTLP based; body 1.6

× 1.6 × 0.5 mm

SOT902-1

74LVC2G08GN

−40 °C to +125 °C

XSON8

extremely thin small outline package; no leads;

8 terminals; body 1.2

× 1.0 × 0.35 mm

SOT1116

74LVC2G08GS

−40 °C to +125 °C

XSON8

extremely thin small outline package; no leads;

8 terminals; body 1.35

× 1.0 × 0.35 mm

SOT1203

Table 2.

Marking codes

Type number

Marking code[1]

74LVC2G08DP

V08

74LVC2G08DC

V08

74LVC2G08GT

V08

74LVC2G08GF

VE

74LVC2G08GD

V08

74LVC2G08GM

V08

74LVC2G08GN

VE

74LVC2G08GS

VE