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SL74HC161N Folha de dados(PDF) 4 Page - System Logic Semiconductor |
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SL74HC161N Folha de dados(HTML) 4 Page - System Logic Semiconductor |
4 / 9 page SL74HC161 System Logic Semiconductor SLS AC ELECTRICAL CHARACTERISTICS(C L=50pF,Input t r=tf=6.0 ns) VCC Guaranteed Limit Symbol Parameter V 25 °C to -55 °C ≤85°C ≤125°C Unit fmax Maximum Clock Frequency (Figures 1,6) 2.0 4.5 6.0 6 30 35 5 24 28 4 20 24 MHz tPLH Maximum Propagation Delay Clock to Q 2.0 4.5 6.0 120 20 16 160 23 20 200 28 22 ns tPHL (Figures 1,6) 2.0 4.5 6.0 145 22 18 185 25 20 320 30 23 ns tPHL Maximum Propagation Delay Reset to Q (Figures 2 and 6) 2.0 4.5 6.0 145 20 17 185 22 19 220 25 21 ns tPLH Maximum Propagation Delay Enable T to Ripple Carry Out 2.0 4.5 6.0 110 16 14 150 18 15 190 20 17 ns tPHL (Figures 3,6) 2.0 4.5 6.0 135 18 15 175 20 16 210 22 20 ns tPLH Maximum Propagation Delay Clock to Ripple 2.0 4.5 6.0 120 22 18 160 27 22 200 30 25 ns tPHL Carry Out (Figures 1,6) 2.0 4.5 6.0 145 22 20 185 28 24 220 35 28 ns tPHL Maximum Propagation Delay Reset to Ripple Carry Out (Figures 2,6) 2.0 4.5 6.0 155 22 18 190 26 22 230 30 25 ns tTLH, tTHL Maximum Output Transition Time, Any Output (Figures 1 and 6) 2.0 4.5 6.0 75 15 13 95 19 16 110 22 19 ns CIN Maximum Input Capacitance - 10 10 10 pF Power Dissipation Capacitance (Per Gate) Typical @25 °C,V CC=5.0 V CPD Used to determine the no-load dynamic power consumption: PD=CPDVCC 2f+I CCVCC 30 pF |
Nº de peça semelhante - SL74HC161N |
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Descrição semelhante - SL74HC161N |
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