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TL1963A-18QKTTRQ1Q1 Folha de dados(PDF) 2 Page - Texas Instruments

Nome de Peças TL1963A-18QKTTRQ1Q1
Descrição Electrónicos  1.5-A LOW-NOISE FAST-TRANSIENT-RESPONSE LOW-DROPOUT REGULATOR
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Fabricante Electrônico  TI1 [Texas Instruments]
Página de início  http://www.ti.com
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TL1963A-Q1
SLVSA79 – APRIL 2010
www.ti.com
TERMINAL FUNCTIONS
NO.
NAME
DESCRIPTION
KTT
Shutdown. The SHDN pin is used to put the TL1963A regulators into a low-power shutdown state. The output
is off when the SHDN pin is pulled low. The SHDN pin can be driven either by 5-V logic or open-collector logic
SHDN
1
with a pullup resistor. The pullup resistor is required to supply the pullup current of the open-collector gate,
normally several microamperes, and the SHDN pin current, typically 3 mA. If unused, the SHDN pin must be
connected to VIN. The device is in the low-power shutdown state if the SHDN pin is not connected.
Input. Power is supplied to the device through the IN pin. A bypass capacitor is required on this pin if the
device is more than six inches away from the main input filter capacitor. In general, the output impedance of a
battery rises with frequency, so it is advisable to include a bypass capacitor in battery-powered circuits. A
bypass capacitor (ceramic) in the range of 1 mF to 10 mF is sufficient. The TL1963A regulators are designed
IN
2
to withstand reverse voltages on the IN pin with respect to ground and the OUT pin. In the case of a reverse
input, which can happen if a battery is plugged in backwards, the device acts as if there is a diode in series
with its input. There is no reverse current flow into the regulator, and no reverse voltage appears at the load.
The device protects both itself and the load.
GND
3
Ground
Output. The output supplies power to the load. A minimum output capacitor (ceramic) of 10 mF is required to
OUT
4
prevent oscillations. Larger output capacitors are required for applications with large transient loads to limit
peak voltage transients.
Adjust. For the adjustable TL1963A, this is the input to the error amplifier. This pin is clamped internally to ±7
ADJ
5
V. It has a bias current of 3 mA that flows into the pin. The ADJ pin voltage is 1.21 V referenced to ground,
and the output voltage range is 1.21 V to 20 V.
Sense. For fixed voltage versions of the TL1963A (TL1963A-1.5, TL1963A-1.8, TL1963A-2.5, and
TL1963A-3.3), the SENSE pin is the input to the error amplifier. Optimum regulation is obtained at the point
where the SENSE pin is connected to the OUT pin of the regulator. In critical applications, small voltage drops
are caused by the resistance (RP) of PC traces between the regulator and the load. These may be eliminated
SENSE
5
by connecting the SENSE pin to the output at the load as shown in Figure 32. Note that the voltage drop
across the external PC traces adds to the dropout voltage of the regulator. The SENSE pin bias current is 600
mA at the rated output voltage. The SENSE pin can be pulled below ground (as in a dual supply system in
which the regulator load is returned to a negative supply) and still allow the device to start and operate.
For the KTT package, the exposed thermal pad is connected to ground and must be soldered to the PCB for
Thermal Pad
rated thermal performance.
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
IN
–20 V to 20 V
OUT
–20 V to 20 V
Input-to-output differential(2)
–20 V to 20 V
VIN
Input voltage range
SENSE
–20 V to 20 V
ADJ
–7 V to 7 V
SHDN
–20 V to 20 V
tshort
Output short-circuit duration
Indefinite
TJ
Operating virtual-junction temperature range
–40°C to 125°C
Tstg
Storage temperature range
–65°C to 150°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
Absolute maximum input-to-output differential voltage cannot be achieved with all combinations of rated IN pin and OUT pin voltages.
With the IN pin at 20 V, the OUT pin may not be pulled below 0 V. The total measured voltage from IN to OUT cannot exceed ±20 V.
PACKAGE THERMAL DATA
(1)
PACKAGE
BOARD
qJA
qJC
qJP
(2)
TO-263 (KTT)
High K, JESD 51-5
26.5°C/W
24.1°C/W
0.38°C/W
(1)
Maximum power dissipation is a function of TJ(max), qJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/qJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
(2)
For packages with exposed thermal pads, such as QFN, PowerPAD™, and PowerFLEX™, qJP is defined as the thermal resistance
between the die junction and the bottom of the exposed pad.
2
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