ADC1002S020 datasheet(6/18 Pages) IDT

Nome de Peças	ADC1002S020

Descrição Electrónicos	Single 10 bits ADC, up to 20 MHz

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Fabricante Electrônico	IDT [Integrated Device Technology]

Página de início	http://www.idt.com

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ADC1002S020_3

Product data sheet

Rev. 03 — 2 July 2012

6 of 18

Integrated Device Technology

ADC1002S020

Single 10 bits ADC, up to 20 MHz

10. Characteristics

Table 6.

Characteristics

VDDA = V7 to V9 = 3.3 V; VDDD = V4 to V3 = V18 to V19 = 3.3 V; VDDO = V20 to V21 = 3.3 V; VSSA, VSSD and VSSO shorted

together; Vi(p-p) = 1.83 V; CL = 20 pF; Tamb = 0 C to 70 C; typical values measured at Tamb = 25 C unless otherwise

specified.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Supplies

VDDA

analog supply voltage

3.0

3.3

5.25

V

VDDD1

digital supply voltage 1

3.0

3.3

5.25

V

VDDD2

digital supply voltage 2

3.0

3.3

5.25

V

VDDO

output supply voltage

3.0

3.3

5.25

V

VDD

supply voltage difference VDDA  VDDD; VDDD  VDDO;

VDDA  VDDO

0.2

-

+0.2

V

IDDA

analog supply current

-

7.5

10

mA

IDDD

digital supply current

-

7.5

10

mA

IDDO

output supply current

fclk = 20 MHz; ramp input;

CL = 20 pF

-

1

2

mA

Ptot

total power dissipation

operating; VDDD = 3.3 V

-

53

73

mW

standby mode

-

4

-

mW

Inputs

Clock input CLK (Referenced to VSSD);[1]

VIL

LOW-level input voltage

0

-

0.3 VDDD

V

VIH

HIGH-level input voltage VDDD  3.6 V

0.6 VDDD

-

VDDD

V

VDDD > 3.6 V

0.7 VDDD

-

VDDD

V

IIL

LOW-level input current

VCLK = 0.3 VDDD

1

0

+1

A

IIH

HIGH-level input current VCLK = 0.7 VDDD

-

5

A

Zi

input impedance

fclk = 20 MHz

-

4

-

k



Ci

input capacitance

fclk = 20 MHz

-

3

-

pF

Inputs OE and STDBY (Referenced to VSSD); see Table 7 and 8

VIL

LOW-level input voltage

0

-

0.3 VDDD

V

VIH

HIGH-level input voltage VDDD  3.6 V

0.6 VDDD

-

VDDD

V

VDDD > 3.6 V

0.7 VDDD

-

VDDD

V

IIL

LOW-level input current

VIL = 0.3 VDDD

1

-

A

IIH

HIGH-level input current VIH = 0.7 VDDD

-

1

A

Analog input VI (Referenced to VSSA)

IIL

LOW-level input current

VI = VRB

-

0

-

A

IIH

HIGH-level input current VI = VRT

-

35

-

A

Zi

input impedance

fi = 1 MHz

-

5

-

k



Ci

input capacitance

fi = 1 MHz

-

8

-

pF

Reference voltages for the resistor ladder; see Table 8

VRB

voltage on pin RB

1.1

1.2

-

V

VRT

voltage on pin RT

3.0

3.3

VDDA

V

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