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DAC1617D1G0 Folha de dados(PDF) 10 Page - Integrated Device Technology

Nome de Peças DAC1617D1G0
Descrição Electrónicos  Dual 16-bit DAC, LVDS interface, up to 1 Gsps, x2, x4 and x8 interpolating
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Fabricante Electrônico  IDT [Integrated Device Technology]
Página de início  http://www.idt.com
Logo IDT - Integrated Device Technology

DAC1617D1G0 Folha de dados(HTML) 10 Page - Integrated Device Technology

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DAC1617D1G0 3
© IDT 2012. All rights reserved.
Preliminary data sheet
Rev. 03 — 2 July 2012
10 of 78
Integrated Device Technology
DAC1617D1G0
Dual 16-bit DAC: up to 1 Gsps; x2, x4 and x8 interpolating
EG
gain error
variation
D-
<tbd>
-
ppm/
C
INL
integral
non-linearity
D-
<tbd>
-
LSB
DNL
differential
non-linearity
D-
<tbd>
-
LSB
Reference voltage output (pin GAPOUT)
VO(ref)
reference output
voltage
Tamb =+25 CI
-
1.22
-
V
IO(ref)
reference output
current
1.25 V external voltage
D
-
40
-
A
Analog auxiliary outputs (pins AUXAP, AUXAN, AUXBP and AUXBN)
IO(fs)
full-scale output
current
auxiliary DAC A;
differential outputs
I-
3.1
-
mA
auxiliary DAC B;
differential outputs
I-
3.1
-
mA
VO(aux)
auxiliary output
voltage
compliance range
D
0
-
2.3
V
LVDS input timing
fdata
data rate
fs(max) specification must
be respected
(fs =fdata  interpolation
factor)
C-
-
370
MHz
tsk(clk-D)
skew time from
clock to data
input
fDATA = 184.32 Mhz
C
800
-
830
ps
fDATA = 245.76 MHz
C
500
-
675
ps
fDATA = 307.2 MHz
C
300
-
520
ps
fDATA = 368.64 MHz
C
150
-
500
ps
Table 5.
Characteristics …continued
VDDA(1V8) =1.8 V; VDDD =1.8 V; VDDA(3V3) = 3.3 V; Typical values measured at Tamb =+25 C; RL =50 ; IO(fs) =20 mA;
maximum sample rate used; external PLL; no auxiliary DAC; no inverse sinus x/x; no output correction; output load condition
defined in Figure 29; output level = 1 V (p-p).
Symbol
Parameter
Conditions
Test
[1]
Min
Typ
Max
Unit


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