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TPS84210RKGR Folha de dados(PDF) 16 Page - Texas Instruments |
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TPS84210RKGR Folha de dados(HTML) 16 Page - Texas Instruments |
16 / 29 page TPS84210 SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 www.ti.com Power Good (PWRGD) The PWRGD pin is an open drain output. Once the voltage on the SENSE+ pin is between 93% and 105% of the set voltage, the PWRGD pin pull-down is released and the pin floats. The recommended pull-up resistor value is between 10 k Ω and 100 kΩ to a voltage source that is 6 V or less. The PWRGD pin is in a defined state once VIN is greater than 1.2 V, but with reduced current sinking capability. The PWRGD pin achieves full current sinking capability once the VIN pin is above 2.95V. Figure 21 shows the PWRGD waveform during power-up. The PWRGD pin is pulled low when the voltage on SENSE+ is lower than 91% or greater than 107% of the nominal set voltage. Also, the PWRGD pin is pulled low if the input UVLO or thermal shutdown is asserted, or if the INH pin is pulled low. Power-Up Characteristics When configured as shown in the front page schematic, the TPS84210 produces a regulated output voltage following the application of a valid input voltage. During the power-up, internal soft-start circuitry slows the rate that the output voltage rises, thereby limiting the amount of in-rush current that can be drawn from the input source. The soft-start circuitry introduces a short time delay from the point that a valid input voltage is recognized. Figure 21 shows the start-up waveforms for a TPS84210, operating from a 5-V input and with the output voltage adjusted to 1.8 V. The waveform is measured with a 2-A constant current load. Figure 21. Start-Up Waveforms Remote Sense The SENSE+ pin must be connected to VOUT at the load, or at the device pins. Connecting the SENSE+ pin to VOUT at the load improves the load regulation performance of the device by allowing it to compensate for any I-R voltage drop between its output pins and the load. An I-R drop is caused by the high output current flowing through the small amount of pin and trace resistance. This should be limited to a maximum of 300 mV. NOTE The remote sense feature is not designed to compensate for the forward drop of nonlinear or frequency dependent components that may be placed in series with the converter output. Examples include OR-ing diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the SENSE+ connection, they are effectively placed inside the regulation control loop, which can adversely affect the stability of the regulator. 16 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): TPS84210 |
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