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CXA3205N Folha de dados(PDF) 7 Page - Sony Corporation |
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CXA3205N Folha de dados(HTML) 7 Page - Sony Corporation |
7 / 23 page —7— CXA3205N Item SDA, SCL “H” level input voltage “L” level input voltage “H” level input current “L” level input current SDA “L” output voltage Clock input hysteresis Clock rate CPO (charge pump) Output current 1 Output current 2 Leak current 1 Leak current 2 REFOSC Oscillator frequency range Input capacitance Drive level BVL, BVH, BU (Band SW) Output current Saturation voltage Leak current FMT (Band SW) Output current Saturation voltage Leak current Bus timing SCL clock frequency Start waiting time Start hold time Low hold time High hold time Start setup time Data hold time Data setup time Rise time Fall time Stop setup time Symbol VIH VIL IIH IIL LSDA CIHYS CIRATE ICPO1 ICPO2 LeakCP1 LeakCP2 FXTOSC CXTOSC VXTOSC IBS1 VSAT1 LeakBS1 IBS2 VSAT2 LeakBS2 fSCL tWSTA tHSTA tLOW tHIGH tSSTA tHDAT tSDAT tR tF tSSTO Measurement conditions VIH = VCC VIL = GND Sink current = 3 mA Byte4/Bit6 = 0 Byte4/Bit6 = 1 Byte4/Bit6 = 0 Byte4/Bit6 = 1 When ON When ON Sink current = 20 mA When OFF When ON When ON Sink current = 5 mA When OFF See Timing Chart on Page 15. See Timing Chart on Page 15. See Timing Chart on Page 15. See Timing Chart on Page 15. See Timing Chart on Page 15. See Timing Chart on Page 15. See Timing Chart on Page 15. See Timing Chart on Page 15. See Timing Chart on Page 15. See Timing Chart on Page 15. Min. Typ. Max. Unit 3 VCC V GND 1.5 V 0 –0.1 µA –1 –2 µA 0.4 V 0.25 0.4 0.65 V 0.5 MHz ±35 ±50 ±75 µA ±140 ±200 ±300 µA 30 nA 100 µA 3 12 MHz 17.5 19 20.5 pF 200 400 mVp-p –25 mA 100 200 mV 0.5 3 µA –7 mA 75 150 mV 0.03 0.1 µA 0 400 kHz 1300 ns 600 ns 1300 ns 600 ns 600 ns 1300 ns 600 ns 300 ns 300 ns 600 ns PLL Block ∗1 Measured value for untuned inputs. ∗2 Noise figure is the direct-reading value of NF meter in DSB. ∗3 Desired signal (fD) input level is –30 dBm. Undesired signal (fUD) is 100 kHz, 30 % AM at ±12 MHz. The measurement value is undesired signal level, it measured with a spectrum analyzer at S/I=46 dB. ∗4 Value when the PLL is not operating. ∗5 Loss caused by external parts connected to Pins 24 and 25 is compensated. This is the value converted to IC output pin amplitude. |
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