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74LVX3245QSC Folha de dados(PDF) 1 Page - Fairchild Semiconductor

Nome de Peças 74LVX3245QSC
Descrição Electrónicos  8-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
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Fabricante Electrônico  FAIRCHILD [Fairchild Semiconductor]
Página de início  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

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February 2010
© 1993 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74LVX3245
8-Bit Dual Supply Translating Transceiver with
3-STATE Outputs
General Description
The LVX3245 is a dual-supply, 8-bit translating transceiver
that is designed to interface between a 3V bus and a 5V
bus in a mixed 3V/5V supply environment. The Transmit/
Receive (T/R) input determines the direction of data flow.
Transmit (active-HIGH) enables data from A Ports to B
Ports; Receive (active-LOW) enables data from B Ports to
A Ports. The Output Enable input, when HIGH, disables
both A and B Ports by placing them in a high impedance
condition. The A Port interfaces with the 3V bus; the B Port
interfaces with the 5V bus.
The LVX3245 is suitable for mixed voltage applications
such as notebook computers using 3.3V CPU and 5V
peripheral components.
Features
■ Bidirectional interface between 3V and 5V buses
■ Inputs compatible with TTL level
■ 3V data flow at A Port and 5V data flow at B Port
■ Outputs source/sink 24 mA
■ Guaranteed simultaneous switching noise level and
dynamic threshold performance
■ Implements proprietary EMI reduction circuitry
■ Functionally compatible with the 74 series 245
Ordering Code:
Order Number
Package Number
Package Description
74LVX3245WM
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LVX3245QSC
MQA24
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide
74LVX3245MTC
MTC24
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol/s
Pin Descriptions
Pin Names
Description
OE
Output Enable Input
T/R
Transmit/Receive Input
A0–A7
Side A Inputs or 3-STATE Outputs
B0–B7
Side B Inputs or 3-STATE Outputs
Connection Diagram/s


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