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AD1958YRS Folha de dados(PDF) 3 Page - Analog Devices |
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AD1958YRS Folha de dados(HTML) 3 Page - Analog Devices |
3 / 8 page REV. 0 –3– AD1958 TEMPERATURE RANGE Min Typ Max Unit Specifications Guaranteed 25 °C Functionality Guaranteed –40 +105 * °C Storage –55 +125 °C NOTE *105 °C ambient guaranteed for a 4-layer board, two 1 oz. planes, two 2 oz. signal layers. Derate to 85°C for 2-layer board, 2 oz. layers. Specifications subject to change without notice. POWER Min Typ Max Unit Supplies Voltage, Analog Digital PLL 4.50 5 5.50 V Analog Current 36 41 mA Digital Current 25 29 mA PLL Current 30 34 mA Dissipation Operation—All Supplies 455 540 mW Operation—Analog Supply 180 mW Operation—Digital Supply 125 mW Operation—PLL Supply 150 mW Power Supply Rejection Ratio 1 kHz 300 mV p-p Signal at Analog Supply Pins –60 dB 20 kHz 300 mV p-p Signal at Analog Supply Pins –50 dB Specifications subject to change without notice. DIGITAL FILTER CHARACTERISTICS Sample Rate (kHz) Pass Band (kHz) Stop Band (kHz) Stop Band Attenuation (dB) Pass Band Ripple (dB) 44.1 DC–20 24.1–328.7 75 ±0.0002 48 DC–21.8 26.23–358.28 75 ±0.0002 96 DC–39.95 56.9–327.65 75 ±0.0005 192 DC–87.2 117–327.65 60 0/–0.04 (DC–21.8 kHz) 0/–0.5 (DC–65.4 kHz) 0/–1.5 (DC–87.2 kHz) Specifications subject to change without notice. GROUP DELAY Chip Mode Group Delay Calculation fS Group Delay Unit INT8 × Mode 24.625/fS 48 kHz 513 µs INT4 × Mode 15.75/fS 96 kHz 164 µs INT2 × Mode 14/fS 192 kHz 72.91 µs Specifications subject to change without notice. DIGITAL TIMING (Guaranteed over –40 °C to +105 C, AVDD = DVDD = PVDD = 5.0 V 10%) Min Unit tDMP MCLK Period (FMCLK = 256 × FLRCLK) 54 ns tDML MCLK LO Pulsewidth (All Modes) 15 ns tDMH MCLK HI Pulsewidth (All Modes) 10 ns tDBH BCLK HI Pulsewidth 20 ns tDBL BCLK LO Pulsewidth 20 ns tDBP BCLK Period 60 ns tDLS LRCLK Setup 20 ns tDLH LRCLK Hold (DSP Serial Port Mode Only) 20 ns tDDS SDATA Setup 15 ns tDDH SDATA Hold 15 ns tRSTL RST LO Pulsewidth 15 ns Specifications subject to change without notice. |
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