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AD734BQ Folha de dados(PDF) 7 Page - Analog Devices |
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AD734BQ Folha de dados(HTML) 7 Page - Analog Devices |
7 / 12 page AD734 –7– REV. C Current Output It may occasionally be desirable to convert the output voltage to a current. In correlation applications, for example, multiplica- tion is followed by integration; if the output is in the form of a current, a simple grounded capacitor can perform this function. Figure 6 shows how this can be achieved. The op amp forces the voltage across Z1 and Z2, and thus across the resistor RS, to be the product XY/U. Note that the input resistance of the Z interface is in shunt with RS, which must be calculated accordingly. The smallest FS current is simply ±10 V/50 kΩ, or ±200 µA, with a tolerance of about 20%. To guarantee a 1% conversion tolerance without adjustment, RS must be less than 2.5 k Ω. The maximum full scale output current should be limited to about ±10 mA (thus, R S = 1 k Ω). This concept can be applied to all connection modes, with the appropriate choice of terminals. Squaring and Frequency-Doubling Squaring of an input signal, E, is achieved simply by connecting the X and Y inputs in parallel; the phasing can be chosen to produce an output of E 2/U or –E2/U as desired. The input may have either polarity, but the basic output will either always be positive or negative; as for multiplication, the Z2 input may be used to add a further signal to the output. When the input is a sine wave, a squarer behaves as a frequency- doubler, since (Esinwt) 2 = E2 (1 – cos2wt)/2 (8) Equation (8) shows a dc term at the output which will vary strongly with the amplitude of the input, E. This dc term can be avoided using the connection shown in Figure 7, where an RC-network is used to generate two signals whose product has no dc term. The output is W = 4 E 2 sin wt + π 4 E 2 sin wt − π 4 1 10 V (9) for w = 1/CR1, which is just W = E2(cos2wt)/( 10 V) (10) which has no dc component. To restore the output to ±10 V when E = 10 V, a feedback attenuator with an approximate ratio of 4 is used between W and Z1; this technique can be used wherever it is desired to achieve a higher overall gain in the transfer function. In fact, the values of R3 and R4 include additional compensa- tion for the effects of the 50 k Ω input resistance of all three interfaces; R2 is included for a similar reason. These resistor values should not be altered without careful calculation of the consequences; with the values shown, the center frequency f0 is 100 kHz for C = 1 nF. The amplitude of the output is only a weak function of frequency: the output amplitude will be 0.5% too low at f = 0.9f0 and f = 1.1f0. The cross-connection is simply to produce the cosine output with the sign shown in Equation (10); however, the sign in this case will rarely be important. R2 1.6k R1 1.6k C Esin ωt R3 13k R4 4.32k E cos2 ωt 2 /10V 1 2 3 4 5 6 7 10 8 9 11 13 12 14 W ER VN VP DD Z1 Z2 X1 X2 U1 U2 U0 Y1 Y2 AD734 NC NC 0.1 F 0.1 F +15V –15V L L L Figure 7. Frequency Doubler OPERATION AS A DIVIDER The AD734 supports two methods for performing analog division. The first is based on the use of a multiplier in a feed- back loop. This is the standard mode recommended for multipliers having a fixed scaling voltage, such as the AD534, and will be described in this Section. The second uses the AD734’s unique capability for externally varying the scaling (denominator) voltage directly, and will be described in the next section. Feedback Divider Connections Figure 8 shows the connections for the standard (AD534) divider mode. Feedback from the output, W, is now taken to the Y2 (inverting) input, which, provided that the X-input is posi- tive, establishes a negative feedback path. Y1 should normally be connected to the ground associated with the load circuit, but may optionally be used to sum a further signal to the output. If desired, the polarity of the Y-input connections can be reversed, with W connected to Y1 and Y2 used as the optional summation input. In this case, either the polarity of the X-input connections must be reversed, or the X-input voltage must be negative. Z INPUT 10V FS X INPUT +0.1V TO +10V OPTIONAL SUMMING INPUT 10V FS W = 10 +Y1 (Z2 – Z1) (X1 – X2) 1 2 3 4 5 6 7 10 8 9 11 13 12 14 W ER VN VP DD Z1 Z2 X1 X2 U1 U2 U0 Y1 Y2 AD734 NC NC 0.1 F 0.1 F +15V –15V L L Y1 L Figure 8. Standard (AD534) Divider Connection The numerator input, which is differential and can have either polarity, is applied to pins Z1 and Z2. As with all dividers based on feedback, the bandwidth is directly proportional to the denominator, being 10 MHz for X = 10 V and reducing to 100 kHz for X = 100 mV. This reduction in bandwidth, and the increase in output noise (which is inversely proportional to the denominator voltage) preclude operation much below a denomi- nator of 100 mV. Division using direct control of the denominator (Figure 10) does not have these shortcomings. |
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