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AD74322AARU Folha de dados(PDF) 9 Page - Analog Devices

Nome de Peças AD74322AARU
Descrição Electrónicos  Low Cost, Low Power Stereo Audio Analog Front End
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
Logo AD - Analog Devices

AD74322AARU Folha de dados(HTML) 9 Page - Analog Devices

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AD74322
–9–
Pr D
03/00
PRELIMINARY TECHNICAL DATA
PRELIMINAR
Y
TECHNICAL
DA
TA
4
4
DUAL
REGULATOR
DSP
AD743xx
FILTER
2.4 V
3.3 V
5.0 V
AVDD
VDD2
VDD1
AGND
DGND
DGND
DVDD
Figure <MCLK_Divider>
The divider ratios will allow more convenient sample rate
selection from a common MCLK which may be required
in many voice related applications.
Example 1: fSAMP = 48 kHz and 8 kHz required
MCLK = 48*103 * 256 = 12.288 MHz to cater for 48
kHz fSAMP
For fSAMP = 8 kHz, it is necessary to use the /3 setting in
Pre-Scaler 1, the /2 setting in Pre-Scaler 2 and pass
through in Pre-Scaler 3. This results in an IMCLK =
8*103 * 256 = 2.048 MHz (= 12.288 MHz/6).
Example 2: fSAMP = 48 kHz and 32 kHz required
MCLK =
24.576 MHz
For fSAMP = 48 kHz, it is necessary to use the /2 setting in
Pre-Scaler 1 and the /1 (pass-through) setting in Pre-
Scaler 2 and pass through in Pre-Scaler 3. This results in
an IMCLK = 48*103 * 256 = 12.288 MHz.
For fSAMP = 32 kHz, it is necessary to use the /3 setting in
Pre-Scaler 1 and the /1 (pass-through) setting in Pre-
Scaler 2 and pass through in Pre-Scaler 3. This results in
an IMCLK = 32*103 * 256 = 8.192 MHz.
Example 3: fSAMP = 44.1 kHz and 11.025 kHz required
MCLK = 44.1*103 * 256 = 11.2896 MHz to cater for
44.1 kHz fSAMP
For fSAMP= 11.025 kHz, it is necessary to use the /1 setting in Pre-
Scaler 1 and the /4 setting in Pre-Scaler 2 and pass
through in Pre-Scaler 3. This results in an IMCLK =
11.025*10
3 * 256 = 2.8224 MHz (= 11.2896 MHz/4).
SampleRates
Forallapplicationsthesamplingrateisdefinedbytheinternalmaster
clockfrequency(IMCLK)whereIMCLK=256*fSAMP.
Power-On Reset
The AD74322 features a power-on reset circuit which
ensures that all internal circuitry is reset and initialised to
Figure <PSU_Connection>
a known state following the power-up of the device. There
is also a software reset capability available by setting the
RESET bit in Control Register _.
This control register is
accessed through the Control Port.
Power Supplies and Grounds
The AD74322 features three separate supplies: AVDD,
DVDD1 and DVDD2.
AVDD is the supply to the analog section of the device
and must therefore be of sufficient quality to preserve the
AD74322’s performance characteristics. It is nominally a
2.4 V supply.
DVDD1 is the supply for the digital interface section of
the device. It is fed from the digital supply voltage of the
DSP or controller to which the device is interfaced and
allows the AD74322 to interface with devices operating at
supplies of between 2.4 V -5% to 3.3 V + 10%.
DVDD2 is the supply for the digital core of the
AD74322. It is nominally a 2.4 V supply.


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