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AD7896BR Folha de dados(PDF) 4 Page - Analog Devices

Nome de Peças AD7896BR
Descrição Electrónicos  2.7 V to 5.5 V, 12-Bit, 8 us ADC in 8-Pin SO/DIP
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
Logo AD - Analog Devices

AD7896BR Folha de dados(HTML) 4 Page - Analog Devices

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REV. B
–4–
AD7896
PIN FUNCTION DESCRIPTION
Pin
Pin
No.
Mnemonic
Description
1VIN
Analog Input. The analog input range is 0 V to VDD.
2VDD
Positive supply voltage, +2.7 V to 5.5 V.
3
AGND
Analog Ground. Ground reference for track/hold, comparator and DAC.
4
SCLK
Serial Clock Input. An external serial clock is applied to this input to obtain serial data from
the AD7896. A new serial data bit is clocked out on the falling edge of this serial clock. Data
is guaranteed valid for 10 ns after this falling edge so data can be accepted on the falling edge
when a fast serial clock is used. The serial clock input should be taken low at the end of the
serial data transmission.
5
SDATA
Serial Data Output. Serial data from the AD7896 is provided at this output. The serial data
is clocked out by the falling edge of SCLK, but the data can also be read on the falling edge
of the SCLK. This is possible because data bit N is valid for a specified time after the falling
edge of the SCLK (data hold time) and can be read before data bit N+1 becomes valid a
specified time after the falling edge of SCLK (data access time) (see Figure 4). Sixteen bits
of serial data are provided with four leading zeros followed by the 12 bits of conversion data.
On the sixteenth falling edge of SCLK, the SDATA line is held for the data hold time and
then disabled (three-stated). Output data coding is straight binary.
6
DGND
Digital Ground. Ground reference for digital circuitry.
7
CONVST
Convert Start. Edge-triggered logic input. On the falling edge of this input, the track/hold
goes into its hold mode and conversion is initiated. If CONVST is low at the end of conver-
sion, the part goes into power down mode. In this case, the rising edge of CONVST
“wakes up” the part.
8
BUSY
The BUSY pin is used to indicate when the part is doing a conversion. The BUSY pin will go
high on the falling edge of CONVST and will return low when the conversion is complete.
PIN CONFIGURATION
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
AD7896
VIN
SDATA
DGND
CONVST
BUSY
VDD
AGND
SCLK
ORDERING GUIDE
Temperature
Linearity
SNR
Package
Model
Range
Error (LSB)
(dB)
Option*
AD7896AN
–40
°C to +85°C
±1 LSB
70 dB
N-8
AD7896BN
–40
°C to +85°C
±1/2 LSB
70 dB
N-8
AD7896AR
–40
°C to +85°C
±1 LSB
70 dB
SO-8
AD7896BR
–40
°C to +85°C
±1/2 LSB
70 dB
SO-8
AD7896JR
0
°C to +70°C
±1 LSB
70 dB
SO-8
AD7896SQ
–55
°C to +125°C
±1 LSB
70 dB
Q-8
*N = Plastic DIP; Q = Cerdip; SO = SOIC.


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