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ADV7170 Folha de dados(PDF) 9 Page - Analog Devices

Nome de Peças ADV7170
Descrição Electrónicos  Digital PAL/NTSC Video Encoder with 10-Bit SSAF??and Advanced Power Management
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ADV7170 Folha de dados(HTML) 9 Page - Analog Devices

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ADV7170/ADV7171
–9–
REV. 0
PIN FUNCTION DESCRIPTIONS
Input/
Mnemonic
Output
Function
P15–P0
I
8-Bit 4:2:2 Multiplexed YCrCb Pixel Port (P7–P0) or 16-Bit YCrCb Pixel Port (P15–P0).
P0 represents the LSB.
CLOCK
I
TTL Clock Input. Requires a stable 27 MHz reference Clock for standard operation. Alter-
natively, a 24.52 MHz (NTSC) or 29.5 MHz (PAL) can be used for square pixel operation.
HSYNC
I/O
HSYNC (Modes 1 and 2) Control Signal. This pin may be configured to output (Master
Mode) or accept (Slave Mode) Sync signals.
FIELD/
VSYNC
I/O
Dual Function FIELD (Mode 1) and
VSYNC (Mode 2) Control Signal. This pin may be
configured to output (Master Mode) or accept (Slave Mode) these control signals.
BLANK
I/O
Video Blanking Control Signal. The pixel inputs are ignored when this is Logic Level “0.”
This signal is optional.
SCRESET/RTC
I
This pin can be configured as an input by setting MR22 and MR21 of Mode Register 2. It
can be configured as a subcarrier reset pin, in which case a high-to-low transition on this pin
will reset the subcarrier to Field 0. Alternatively, it may be configured as a Real-Time
Control (RTC) input.
VREF
I/O
Voltage Reference Input for DACs or Voltage Reference Output (1.235 V).
RSET
I
A 150
Ω resistor connected from this pin to GND is used to control full-scale amplitudes of
the video signals.
COMP
O
Compensation Pin. Connect a 0.1
µF Capacitor from COMP to V
AA. For Optimum Dynamic
Performance in low power mode, the value of the COMP capacitor can be lowered to as low
as 2.2 nF.
DAC A
O
PAL/NTSC Composite Video Output. Full-Scale Output is 180 IRE (1286 mV) for NTSC
and 1300 mV for PAL.
DAC C
O
RED/S-Video C/V Analog Output.
DAC D
O
GREEN/S-Video Y/Y Analog Output
DAC B
O
BLUE/Composite/U Analog Output.
SCLOCK
I
MPU Port Serial Interface Clock Input.
SDATA
I/O
MPU Port Serial Data Input/Output.
ALSB
I
TTL Address Input. This signal set up the LSB of the MPU address.
RESET
I
The input resets the on chip timing generator and sets the ADV7170/ADV7171 into default
mode. This is NTSC operation, Timing Slave Mode 0, 8 Bit Operation, 2
× Composite and
S Video out and DAC B powered ON and DAC D powered OFF.
TTX/VAA
I
Teletext Data/Defaults to VAA when Teletext not Selected (enables backward compatibility to
ADV7175/ADV7176).
TTXREQ/GND
O
Teletext Data Request Signal/ Defaults to GND when Teletext not Selected (enables back-
ward compatibility to ADV7175/ADV7176).
VAA
P
Power Supply (+3 V to +5 V).
GND
G
Ground Pin.


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