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74ABT273CMSA Folha de dados(PDF) 1 Page - Fairchild Semiconductor |
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74ABT273CMSA Folha de dados(HTML) 1 Page - Fairchild Semiconductor |
1 / 9 page © 2005 Fairchild Semiconductor Corporation DS011549 www.fairchildsemi.com January 1993 Revised March 2005 74ABT273 Octal D-Type Flip-Flop General Description The ABT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transi- tion, is transferred to the corresponding flip-flop’s Q output. All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements. Features s Eight edge-triggered D-type flip-flops s Buffered common clock s Buffered, asynchronous Master Reset s See ABT377 for clock enable version s See ABT373 for transparent latch version s See ABT374 for 3-STATE version s Output sink capability of 64 mA, source capability of 32 mA s Guaranteed latchup protection s High impedance glitch free bus loading during entire power up and power down cycle s Non-destructive hot insertion capability s Disable time less than enable time to avoid bus conten- tion Ordering Code: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. Connection Diagram Pin Descriptions Order Number Package Package Description Number 74ABT273CSC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74ABT273CSJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ABT273CMSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide 74ABT273CMTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ABT273CMTCX_NL (Note 1) MTC20 Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pin Names Description D0–D7 Data Inputs MR Master Reset (Active LOW) CP Clock Pulse Input (Active Rising Edge) Q0–Q7 Data Outputs |
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Descrição semelhante - 74ABT273CMSA |
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