74ABT899CSC datasheet(6/16 Pages) FAIRCHILD

Nome de Peças	74ABT899CSC

Descrição Electrónicos	9-Bit Latchable Transceiver with Parity Generator/Checker

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Fabricante Electrônico	FAIRCHILD [Fairchild Semiconductor]

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AC Electrical Characteristics

(SSOP Package)

AC Operating Requirements

Symbol

Parameter

TA = +25°CTA = −40°C to +85°C

Units

VCC = +5.0V

VCC = 4.5V–5.5V

CL = 50 pF

Min

Typ

Max

Min

Max

tPLH

Propagation Delay

1.5

3.0

5.3

1.5

5.3

ns

tPHL

An, to Bn

1.53.5

5.31.5

5.3

tPLH

Propagation Delay

2.5

5.9

9.9

2.5

9.9

ns

tPHL

An, Bn to BPAR, APAR

2.5

5.8

9.9

2.5

9.9

tPLH

Propagation Delay

2.5

5.4

9.4

2.5

9.4

ns

tPHL

An, Bn to ERRA, ERRB

2.55.4

9.42.5

9.4

tPLH

Propagation Delay

1.5

3.7

6.5

1.5

6.5

ns

tPHL

APAR, BPAR to ERRA, ERRB

1.53.7

6.51.5

6.5

tPLH

Propagation Delay

2.0

4.4

7.4

2.0

7.4

ns

tPHL

ODD/EVEN to APAR, BPAR

2.0

4.4

7.4

2.0

7.4

tPLH

Propagation Delay

1.8

4.0

6.5

1.8

6.5

ns

tPHL

ODD/EVEN to ERRA, ERRB

1.84.0

6.51.8

6.5

tPLH

Propagation Delay

1.5

3.8

6.5

1.5

6.5

ns

tPHL

SEL to APAR, BPAR

1.5

3.8

6.5

1.5

6.5

tPLH

Propagation Delay

1.5

3.2

5.1

1.5

5.1

ns

tPHL

LEA, LEB to Bn, An

1.53.2

5.11.5

5.1

tPLH

Propagation Delay

2.5

5.9

9.2

2.5

9.2

ns

tPHL

LEA, LEB to BPAR, APAR

2.5

5.7

9.2

2.5

9.2

Generate Mode

tPLH

Propagation Delay

1.5

3.6

5.6

1.5

5.6

ns

tPHL

LEA, LEB to BPAR, APAR,

1.5

3.6

5.6

1.5

5.6

Feed Thru Mode

tPLH

Propagation Delay

1.6

5.4

8.9

1.6

8.9

ns

tPHL

LEA, LEB to ERRA, ERRB

1.65.4

8.91.6

8.9

tPZH

Output Enable Time

1.5

3.6

6.5

1.5

6.5

ns

tPZL

GBA or GAB to An,

1.53.4

6.51.5

6.5

APAR or Bn, BPAR

tPHZ

Output Disable Time

1.0

4.0

6.5

1.0

6.5

ns

tPLZ

GBA or GAB to An,

1.03.3

6.51.0

6.5

APAR or Bn, BPAR

tPLH

Propagation Delay

1.5

3.3

5.9

1.5

5.9

ns

tPHL

APAR to BPAR, BPAR to APAR

1.5

3.8

5.9

1.5

5.9

Symbol

Parameter

TA = +25°CTA = −40°C to +85°C

Units

VCC = +5.0V

VCC = 4.5V–5.5V

CL = 50 pF

Min

Max

Min

Max

tS(H)

Setup Time, HIGH or LOW An,1.5

1.5

ns

tS(L)

APAR to LEA or Bn, BPAR to LEB

1.5

tH(H)

Hold Time, HIGH or LOW An,1.0

1.0

ns

tH(L)

APAR to LEA or Bn, BPAR to LEB

1.0

tW(H)

Pulse Width, HIGH

3.0

ns

LEA or LEB

Nº de peça semelhante - 74ABT899CSC

Fabricante Electrônico	Nome de Peças	Folha de dados	Descrição Electrónicos
NXP Semiconductors	74ABT899	123Kb / 16P	9-bit dual latch transceiver with 8-bit parity generator/checker 3-State 1998 Jan 16
	74ABT899A	123Kb / 16P	9-bit dual latch transceiver with 8-bit parity generator/checker 3-State 1998 Jan 16
	74ABT899D	123Kb / 16P	9-bit dual latch transceiver with 8-bit parity generator/checker 3-State 1998 Jan 16
	74ABT899DB	123Kb / 16P	9-bit dual latch transceiver with 8-bit parity generator/checker 3-State 1998 Jan 16

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Descrição semelhante - 74ABT899CSC

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More results

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