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AD7658YSTZ-REEL Folha de dados(PDF) 11 Page - Analog Devices |
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AD7658YSTZ-REEL Folha de dados(HTML) 11 Page - Analog Devices |
11 / 32 page Data Sheet AD7656/AD7657/AD7658 Rev. D | Page 11 of 32 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 47 AVCC 46 AVCC 45 V5 42 V4 43 AGND 44 AGND 48 V6 41 AVCC 40 AVCC 39 V3 37 AGND 36 V2 35 AVCC 34 AVCC 33 V1 38 AGND 2 DB13 3 DB12 4 DB11 7 DB8/DOUT A 6 DB9/DOUT B 5 DB10/DOUT C 1 DB14/REFBUFEN/DIS 8 DGND 9 VDRIVE 10 DB7/HBEN/DCEN 12 DB5/DCIN A 13 DB4/DCIN B 14 DB3/DCIN C 15 DB2/SEL C 16 DB1/SEL B 11 DB6/SCLK 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 PIN 1 AD7656/AD7657/AD7658 TOP VIEW (Not to Scale) Figure 3. Pin Configuration Table 7. Pin Function Descriptions Pin No. Mnemonic Description 54, 56, 58 REFCAPA, REFCAPB, REFCAPC Decoupling capacitors are connected to these pins. This decouples the reference buffer for each ADC pair. Each REFCAP pin should be decoupled to AGND using 10 µF and 100 nF capacitors. 33, 36, 39, 42, 45, 48 V1 to V6 Analog Input 1 to 6. These are six single-ended analog inputs. In hardware mode, the analog input range on these channels is determined by the RANGE pin. In software mode, it is determined by Bit RNGC to Bit RNGA of the control register (see Table 10). 32, 37, 38, 43, 44, 49, 52, 53, 55, 57, 59 AGND Analog Ground. Ground reference point for all analog circuitry on the AD7656/AD7657/AD7658. All analog input signals and any external reference signal should be referred to this AGND voltage. All 11 of these AGND pins should be connected to the AGND plane of a system. The AGND and DGND voltages should ideally be at the same potential and must not be more than 0.3 V apart, even on a transient basis. 26 DVCC Digital Power, 4.75 V to 5.25 V. The DVCC and AVCC voltages should ideally be at the same potential and must not be more than 0.3 V apart, even on a transient basis. This supply should be decoupled to DGND, and 10 µF and 100 nF decoupling capacitors should be placed on the DVCC pin. 9 VDRIVE Logic Power Supply Input. The voltage supplied at this pin determines the operating voltage of the interface. Nominally at the same supply as the supply of the host interface. This pin should be decoupled to DGND, and 10 µF and 100 nF decoupling capacitors should be placed on the VDRIVE pin. 8, 25 DGND Digital Ground. This is the ground reference point for all digital circuitry on the AD7656/AD7657/AD7658. Both DGND pins should connect to the DGND plane of a system. The DGND and AGND voltages should ideally be at the same potential and must not be more than 0.3 V apart, even on a transient basis. 34, 35, 40, 41, 46, 47, 50, 60 AVCC Analog Supply Voltage, 4.75 V to 5.25 V. This is the supply voltage for the ADC cores. The AVCC and DVCC voltages should ideally be at the same potential and must not be more than 0.3 V apart, even on a transient basis. These supply pins should be decoupled to AGND, and 10 µF and 100 nF decoupling capacitors should be placed on the AVCC pins. 23, 22, 21 CONVST A, CONVST B, CONVST C Conversion Start Input A, B, C. These logic inputs are used to initiate conversions on the ADC pairs. CONVST A is used to initiate simultaneous conversions on V1 and V2. CONVST B is used to initiate simultaneous conversions on V3 and V4. CONVST C is used to initiate simultaneous conversions on V5 and V6. When CONVSTx switches from low to high, the track-and-hold switch on the selected ADC pair switches from track to hold and the conversion is initiated. These inputs can also be used to place the ADC pairs into partial power-down mode. |
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