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DM74LS181 Folha de dados(PDF) 2 Page - Fairchild Semiconductor |
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DM74LS181 Folha de dados(HTML) 2 Page - Fairchild Semiconductor |
2 / 7 page www.fairchildsemi.com 2 Functional Description The DM74LS181 is a 4-bit high speed parallel Arithmetic Logic Unit (ALU). Controlled by the four Function Select inputs (S0–S3) and the Mode Control input (M), it can per- form all the 16 possible logic operations or 16 different arithmetic operations on active HIGH or active LOW oper- ands. The Function Table lists these operations When the Mode Control input (M) is HIGH, all internal car- ries are inhibited and the device performs logic operations on the individual bits as listed. When the Mode Control input is LOW, the carries are enabled and the device per- forms arithmetic operations on the two 4-bit words. The device incorporates full internal carry lookahead and pro- vides for either ripple carry between devices using the Cn+4 output, or for carry lookahead between packages using the signals P (Carry Propagate) and G (Carry Generate). In the ADD mode, P indicates that F is 15 or more, while G indi- cates that F is 16 or more. In the SUBTRACT mode, P indi- cates that F is zero or less, while G indicates that F is less than zero. P and G are not affected by carry in. When speed requirements are not stringent, it can be used in a simple ripple carry mode by connecting the Carry output (Cn+4) signal to the Carry input (Cn) of the next unit. For high speed operation the device is used in conjunction with the 9342 or 93S42 carry lookahead circuit. One carry loo- kahead package is required for each group of four DM74LS181 devices. Carry lookahead can be provided at various levels and offers high speed capability over extremely long word lengths. The A = B output from the device goes HIGH when all four F outputs are HIGH and can be used to indicate logic equivalence over four bits when the unit is in the subtract mode. The A = B output is open-collector and can be wired- AND with other A = B outputs to give a comparison for more than four bits. The A = B signal can also be used with the Cn+4 signal to indicate A > B and A < B. The Function Table lists the arithmetic operations that are performed without a carry in. An incoming carry adds a one to each operation. Thus, select code LHHL generates A minus B minus 1 (2s complement notation) without a carry in and generates A minus B when a carry is applied. Because subtraction is actually performed by complemen- tary addition (1s complement), a carry out means borrow; thus a carry is generated when there is no underflow and no carry is generated when there is underflow. As indi- cated, this device can be used with either active LOW inputs producing active LOW outputs or with active HIGH inputs producing active HIGH outputs. For either case the table lists the operations that are performed to the oper- ands labeled inside the logic symbol. Function Table Note 1: Each bit is shifted to the next most significant position. Note 2: Arithmetic operations expressed in 2s complement notation. Mode Select Active LOW Operands Active HIGH Operands Inputs & Fn Outputs & Fn Outputs Logic Arithmetic (Note 2) Logic Arithmetic (Note 2) S3 S2 S1 S0 (M = H) (M = L) (C n = L) (M = H) (M = L) (C n = H) L LLL A A minus 1 A A LL L H AB AB minus 1 A + B A + B LL H L A + B AB minus 1 A BA + B L L H H Logic 1 minus 1 Logic 0 minus 1 LH L L A + B A plus (A + B)AB A plus AB LH L H B AB plus (A + B)B (A + B) plus AB LH H L A ⊕ B A minus B minus 1 A ⊕ B A minus B minus 1 L HHH A + B A + B AB AB minus 1 H LLL A B A plus (A + B) A + B A plus AB HL L H A ⊕ B A plus B A ⊕ B A plus B HL H L B AB plus (A + B) B (A + B) plus AB HL H H A + BA + B AB AB minus 1 H H L L Logic 0 A plus A (Note 1) Logic 1 A plus A (Note 1) HH L H AB AB plus A A + B (A + B) plus A H H H L AB AB minus A A + B(A + B) plus A H H H H AA AA minus 1 |
Nº de peça semelhante - DM74LS181 |
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Descrição semelhante - DM74LS181 |
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