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FAN5059 Folha de dados(PDF) 2 Page - Fairchild Semiconductor

Nome de Peças FAN5059
Descrição Electrónicos  High Performance Programmable Synchronous
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Fabricante Electrônico  FAIRCHILD [Fairchild Semiconductor]
Página de início  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FAN5059 Folha de dados(HTML) 2 Page - Fairchild Semiconductor

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FAN5059
PRODUCT SPECIFICATION
2
REV. 1.0.4 8/14/03
currents in excess of 16A from a 5V source with minimal
external circuitry. Synchronous-mode operation offers opti-
mum efficiency over the entire specified output voltage range.
An on-board precision low TC reference achieves tight toler-
ance voltage regulation without expensive external compo-
nents, while Programmable Active Drooppermits exact
tailoring of voltage for the most demanding load transients. The
FAN5059 includes linear regulator controllers for Vtt termina-
tion (1.5V), Vclock (2.5V), and Vnorthbridge (1.8V) or Vagp
(selectable 1.5V/3.3V), each adjustable with an external divider.
The FAN5059 also offers integrated functions including Power
Good, Output Enable/Soft Start and current limiting, and is
available in a 24 pin SOIC package.
Pin Assignments
24
23
22
21
20
19
18
17
16
15
14
13
FAN5059
HIDRV
SW
GNDA
VID4
VID3
VID2
VID1
VID0
VTTGATE
VTTFB
VCKGATE
VCKFB
VCCP
LODRV
GNDP
VCCA
VFB
DROOP
ILIM
PWRGD
SS/ENABLE
TYPEDET
VAGPGATE
VAGPFB
1
2
3
4
5
6
7
8
9
10
11
12
Pin Definitions
Pin
Number Pin Name
Pin Function Description
1
HIDRV
High Side FET Driver. Connect this pin through a resistor to the gate of an N-channel
MOSFET. The trace from this pin to the MOSFET gate should be <0.5".
2SW
High side Driver Source and Low side Driver Drain Switching Node. Together with
DROOP and ILIM pins allows FET sensing for Vcc current.
3
GNDA
Analog Ground. Return path for low power analog circuitry. This pin should be
connected to a low impedance system ground plane to minimize ground loops.
4-8
VID0-4
Voltage Identification Code Inputs. These open collector/TTL compatible inputs will
program the output voltage over the ranges specified in Table 2. Pull-up resistors are
internal to the controller.
9
VTTGATE
Gate Driver for VTT Transistor. For 1.5V output.
10
VTTFB
Voltage Feedback for VTT.
11
VCKGATE
Gate Driver for VCK Transistor. For 2.5V output.
12
VCKFB
Voltage Feedback for VCK.
13
VAGPFB
Voltage Feedback for VAGP.
14
VAGPGATE
Gate Driver for VAGP Transistor. For 3.3/1.5V output.
15
TYPEDET
Type Detect. Sets 3.3V or 1.5V for AGP.
16
ENABLE/SS
Output Enable. A logic LOW on this pin will disable all outputs. An internal current source
allows for open collector control. This pin also doubles as soft start for all outputs.
17
PWRGD
Power Good Flag. An open collector output that will be logic LOW if any output voltage
is more than ±12% outside of the nominal output voltage setpoint.
18
ILIM
Vcc Current Feedback. Pin 18 is used in conjunction with pin 2 as the input for the Vcc
current feedback control loop. Layout of these traces is critical to system performance.
See Application Information for details.
19
DROOP
Droop set. Use this pin to set magnitude of active droop.
20
VFB
Vcc Voltage Feedback. Pin 20 is used as the input for the Vcc voltage feedback control
loop. See Application Information for details regarding correct layout.
21
VCCA
Analog VCC. Connect to system 5V supply and decouple with a 0.1µF ceramic capacitor.
22
GNDP
Power Ground. Return pin for high currents flowing in pin 24 (VCCP).
23
LODRV
Vcc Low Side FET Driver. Connect this pin through a resistor to the gate of an N-channel
MOSFET for synchronous operation. The trace from this pin to the MOSFET gate should
be <0.5".
24
VCCP
Power VCC. For all FET drivers. Connect to system 12V supply through a 33
Ω, and
decouple with a 1µF ceramic capacitor.


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