Os motores de busca de Datasheet de Componentes eletrônicos
  Portuguese  ▼
ALLDATASHEETPT.COM

X  

AD7470ARU-REEL7 Folha de dados(PDF) 9 Page - Analog Devices

Nome de Peças AD7470ARU-REEL7
Descrição Electrónicos  1.75 MSPS, 4 mW 10-Bit/12-Bit Parallel ADCs
Download  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
Logo AD - Analog Devices

AD7470ARU-REEL7 Folha de dados(HTML) 9 Page - Analog Devices

Back Button AD7470ARU-REEL7 Datasheet HTML 5Page - Analog Devices AD7470ARU-REEL7 Datasheet HTML 6Page - Analog Devices AD7470ARU-REEL7 Datasheet HTML 7Page - Analog Devices AD7470ARU-REEL7 Datasheet HTML 8Page - Analog Devices AD7470ARU-REEL7 Datasheet HTML 9Page - Analog Devices AD7470ARU-REEL7 Datasheet HTML 10Page - Analog Devices AD7470ARU-REEL7 Datasheet HTML 11Page - Analog Devices AD7470ARU-REEL7 Datasheet HTML 12Page - Analog Devices AD7470ARU-REEL7 Datasheet HTML 13Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 20 page
background image
REV. B
AD7470/AD7472
–9–
TERMINOLOGY
Integral Nonlinearity
This is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function. The end-
points of the transfer function are zero scale, a point 1/2 LSB
below the first code transition, and full scale, a point 1/2 LSB
above the last code transition.
Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Offset Error
This is the deviation of the first code transition (00 . . . 000) to
(00 . . . 001) from the ideal, i.e., AGND + 0.5 LSB.
Gain Error
The last transition should occur at the analog value 1.5 LSB
below the nominal full scale. The first transition is a 0.5 LSB
above the low end of the scale (zero in the case of AD7470/
AD7472). The gain error is the deviation of the actual difference
between the first and last code transitions from the ideal differ-
ence between the first and last code transitions with offset errors
removed.
Track-and-Hold Acquisition Time
The track-and-hold amplifier returns into track mode after the
end of conversion. Track-and-Hold acquisition time is the time
required for the output of the track-and-hold amplifier to reach
its final value, within
±1 LSB, after the end of conversion.
Signal to (Noise + Distortion) Ratio
This is the measured ratio of signal to (noise + distortion) at the
output of the A/D converter. The signal is the rms amplitude of
the fundamental. Noise is the sum of all nonfundamental sig-
nals up to half the sampling frequency (fS/2), excluding dc. The
ratio is dependent on the number of quantization levels in the
digitization process; the more levels, the smaller the quantization
noise. The theoretical signal to (noise + distortion) ratio for an
ideal N-bit converter with a sine wave input is given by
Signal to (Noise + Distortion) = (6.02 N + 1.76) dB
Thus for a 12-bit converter, this is 74 dB and for a 10-bit con-
verter is 62 dB.
Total Harmonic Distortion (THD)
Total harmonic distortion is the ratio of the rms sum of har-
monics to the fundamental. For the AD7470/AD7472 it is
defined as
THD dB
VVVVV
V
()
log
()
=
++++
20
2
2
3
2
4
2
5
2
6
2
1
where V1 is the rms amplitude of the fundamental and V2, V3,
V4, V5, and V6 are the rms amplitudes of the second through the
sixth harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to fS/2 and excluding dc) to the rms value of the
fundamental. Normally, the value of this specification is deter-
mined by the largest harmonic in the spectrum, but for ADCs
where the harmonics are buried in the noise floor, it will be a
noise peak.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities will create distortion
products at sum and difference frequencies of mfa
± nfb where
m, n = 0, 1, 2, 3, etc. Intermodulation distortion terms are
those for which neither m nor n is equal to zero. For example,
the second-order terms include (fa + fb) and (fa – fb), while the
third-order terms include (2fa + fb), (2fa – fb), (fa + 2fb) and
(fa – 2fb).
The AD7470/AD7472 are tested using the CCIF standard
where two input frequencies near the top end of the input band-
width are used. In this case, the second-order terms are usually
distanced in frequency from the original sine waves while the
third-order terms are usually at a frequency close to the input
frequencies. As a result, the second- and third-order terms are
specified separately. The calculation of the intermodulation
distortion is as per the THD specification where it is the ratio
of the rms sum of the individual distortion products to the rms
amplitude of the sum of the fundamentals expressed in dBs.
Aperture Delay
In a sample-and-hold, the time required after the hold command
for the switch to open fully is the aperture delay. The sample is,
in effect, delayed by this interval, and the hold command would
have to be advanced by this amount for precise timing.
Aperture Jitter
Aperture jitter is the range of variation in the aperture delay.
In other words, it is the uncertainty about when the sample is
taken. Jitter is the result of noise which modulates the phase
of the hold command. This specification establishes the ulti-
mate timing error, hence the maximum sampling frequency
for a given resolution. This error will increase as the input
dV/dt increases.


Nº de peça semelhante - AD7470ARU-REEL7

Fabricante ElectrônicoNome de PeçasFolha de dadosDescrição Electrónicos
logo
Analog Devices
AD7470ARU-REEL7 AD-AD7470ARU-REEL7 Datasheet
325Kb / 20P
   1.75 MSPS, 4 mW 10-Bit-12-Bit Parallel ADCs
REV. B
More results

Descrição semelhante - AD7470ARU-REEL7

Fabricante ElectrônicoNome de PeçasFolha de dadosDescrição Electrónicos
logo
Analog Devices
AD7472ARZ AD-AD7472ARZ Datasheet
325Kb / 20P
   1.75 MSPS, 4 mW 10-Bit-12-Bit Parallel ADCs
REV. B
AD7472 AD-AD7472_15 Datasheet
529Kb / 21P
   1.75 MSPS, 4 mW 10-Bit/12-Bit Parallel ADCs
REV. B
AD7470 AD-AD7470_15 Datasheet
529Kb / 21P
   1.75 MSPS, 4 mW 10-Bit/12-Bit Parallel ADCs
REV. B
AD7470 AD-AD7470 Datasheet
197Kb / 16P
   1.75 MSPS, 4 mW 10-Bit/12-Bit Parallel ADCs
REV. A
AD7934BRUZ-REEL7 AD-AD7934BRUZ-REEL7 Datasheet
768Kb / 32P
   4-Channel, 1.5 MSPS, 10-Bit and 12-Bit Parallel ADCs with a Sequencer
REV. B
AD7933 AD-AD7933_15 Datasheet
768Kb / 32P
   4-Channel, 1.5 MSPS, 10-Bit and 12-Bit Parallel ADCs with a Sequencer
REV. B
AD7933 AD-AD7933 Datasheet
1Mb / 32P
   4-Channel, 1.5 MSPS, 12-Bit and 10-Bit Parallel ADCs with a Sequencer
Rev.PrG
AD7934 AD-AD7934_15 Datasheet
768Kb / 32P
   4-Channel, 1.5 MSPS, 10-Bit and 12-Bit Parallel ADCs with a Sequencer
REV. B
AD7475 AD-AD7475_V01 Datasheet
519Kb / 24P
   1 MSPS,12-Bit ADCs
Rev. D
AD7475 AD-AD7475 Datasheet
218Kb / 16P
   1 MSPS, 12-Bit ADCs
REV. A
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20


Folha de dados Download

Go To PDF Page


Ligação URL




Privacy Policy
ALLDATASHEETPT.COM
ALLDATASHEET é útil para você?  [ DONATE ] 

Sobre Alldatasheet   |   Publicidade   |   Contato conosco   |   Privacy Policy   |   roca de Link   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com