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FIN1001M5 Folha de dados(PDF) 1 Page - Fairchild Semiconductor

Nome de Peças FIN1001M5
Descrição Electrónicos  3.3V LVDS 1-Bit High Speed Differential Driver
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Fabricante Electrônico  FAIRCHILD [Fairchild Semiconductor]
Página de início  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FIN1001M5 Folha de dados(HTML) 1 Page - Fairchild Semiconductor

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© 2002 Fairchild Semiconductor Corporation
DS500721
www.fairchildsemi.com
December 2001
Revised January 2002
FIN1001
3.3V LVDS 1-Bit High Speed Differential Driver
General Description
This single driver is designed for high speed interconnects
utilizing Low Voltage Differential Signaling (LVDS) technol-
ogy. The driver translates LVTTL signal levels to LVDS lev-
els with a typical differential output swing of 350 mV which
provides low EMI at ultra low power dissipation even at
high frequencies. This device is ideal for high speed trans-
fer of clock or data.
The FIN1001 can be paired with its companion receiver,
the FIN1002, or with any other LVDS receiver.
Features
I Greater than 600Mbs data rate
I 3.3V power supply operation
I 0.5ns maximum differential pulse skew
I 1.5ns maximum propagation delay
I Low power dissipation
I Power-Off protection
I Meets or exceeds the TIA/EIA-644 LVDS standard
I Flow-through pinout simplifies PCB layout
I 5-Lead SOT23 package saves space
Ordering Code:
Pin Descriptions
Function Table
H
= HIGH Logic Level
L
= LOW Logic Level
Connection Diagram
Pin Assignment for SOT23
(Top View)
Order Number
Package Number
Package Description
FIN1001M5
MA05B
5-Lead SOT23, JEDEC MO-178, 1.6mm [250 Units on Tape and Reel]
FIN1001M5X
MA05B
5-Lead SOT23, JEDEC MO-178, 1.6mm [3000 Units on Tape and Reel]
Pin Name
Description
DIN
LVTTL Data Input
DOUT+
Non-inverting LVDS Driver Output
DOUT−
Inverting LVDS Driver Output
VCC
Power Supply
GND
Ground
NC
No Connect
Input
Outputs
DIN
DOUT+
DOUT−
LL
H
HH
L


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