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FM28V100 Folha de dados(PDF) 6 Page - Cypress Semiconductor

Nome de Peças FM28V100
Descrição Electrónicos  1Mbit Bytewide F-RAM Memory
Download  14 Pages
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Fabricante Electrônico  CYPRESS [Cypress Semiconductor]
Página de início  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

FM28V100 Folha de dados(HTML) 6 Page - Cypress Semiconductor

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FM28V100 - 128Kx8 FRAM
Document Number: 001-86202 Rev. **
Page 6 of 14
SRAM Drop-In Replacement
The FM28V100 has been designed to be a drop-in
replacement for standard asynchronous SRAMs. The
device does not require the CE pins to toggle for each
new address.
Both CE pins may remain active
indefinitely while VDD is applied. When both CE pins
are active, the device automatically detects address
changes and a new access begins. It also allows page
mode operation at speeds up to 33MHz.
A typical application is shown in Figure 3. It shows a
pullup resistor on /CE1 which will keep the pin high
during power cycles assuming the MCU/MPU pin tri-
states during the reset condition. The pullup resistor
value should be chosen to ensure the /CE1 pin tracks
VDD yet a high enough value that the current drawn
when /CE1 is low is not an issue.
Although not
required, it is recommended that CE2 be tied to VDD
if the controller provides an active-low chip enable.
Figure 3. Typical Application using Pullup
Resistor on /CE1
For applications that require the lowest power
consumption, the CE signals should be active only
during memory accesses. Due to the external pullup
resistor, some supply current will be drawn while
/CE1 is low. When /CE1 is high, the device draws no
more than the maximum standby current ISB.
Note that if /CE1 is grounded and CE2 tied to VDD,
the user must be sure /WE is not low at powerup or
powerdown events. If the chip is enabled and /WE is
low during power cycles, data corruption will occur.
Figure 4 shows a pullup resistor on /WE which will
keep the pin high during power cycles assuming the
MCU/MPU pin tri-states during the reset condition.
The pullup resistor value should be chosen to ensure
the /WE pin tracks VDD yet a high enough value that
the current drawn when /WE is low is not an issue. A
10Kohm resistor draws 330uA when /WE is low and
VDD=3.3V.
Figure 4. Use of Pullup Resistor on /WE
The FM28V100 is backward compatible with the
1Mbit FM20L08 and 256Kbit FM18L08 devices.
PCB Layout Recommendations
A 0.1uF decoupling capacitor should be placed close
to pin 8 (VDD) and the ground side of the capacitor
should be connected to either a ground plane or low
impedance path back to pin 24 (VSS). It is best to use
a chip capacitor that has low ESR and has good high
frequency characteristics.
If the controller drives the address and chip enable
from the same timing edge, it is best to keep the
address routes short and of equal length. A simple RC
circuit may be inserted in the chip enable path to
provide some delay and timing margin for the
FM28V100’s address setup time tAS.
As a general rule, the layout designer may need to
add series termination resistors to controller outputs
that have fast transitions or routes that are > 15cm in
length. This is only necessary if the edge rate is less
than or equal to the round trip trace delay. Signal
overshoot and ringback may be large enough to cause
erratic device behavior. It is best to add a 50 ohm
resistor (30 – 60 ohms) near the output driver
(controller) to reduce such transmission line effects.
CE2
CE1
WE
OE
A(16:0)
DQ(7:0)
FM28V100
VDD
MCU/
MPU
R
CE2
CE1
WE
OE
A(16:0)
DQ(7:0)
FM28V100
VDD
MCU/
MPU
R


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