AD5791

Data Sheet

Rev. D | Page 2 of 28

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Timing Characteristics ................................................................ 5

Absolute Maximum Ratings............................................................ 7

ESD Caution.................................................................................. 7

Pin Configuration and Function Descriptions............................. 8

Typical Performance Characteristics ............................................. 9

Terminology .................................................................................... 17

Theory of Operation ...................................................................... 19

DAC Architecture....................................................................... 19

Serial Interface ............................................................................ 19

Hardware Control Pins.............................................................. 20

On-Chip Registers...................................................................... 21

AD5791 Features ............................................................................ 24

Power-On to 0 V......................................................................... 24

Configuring the AD5791 .......................................................... 24

DAC Output State ...................................................................... 24

Linearity Compensation............................................................ 24

Output Amplifier Configuration.............................................. 24

Applications Information .............................................................. 26

Typical Operating Circuit ......................................................... 26

Outline Dimensions....................................................................... 27

Ordering Guide .......................................................................... 27

REVISION HISTORY

7/13—Rev. C to Rev. D

Change to Table 4 ............................................................................. 5

Deleted Figure 4, Renumbered Sequentially................................. 7

Deleted Daisy-Chain Operation Section and Figure 51............ 21

11/11—Rev. B to Rev. C

Added Figure 48; Renumbered Sequentially .............................. 17

Change to Ideal Transfer Function Equation.............................. 22

9/11—Rev. A to Rev. B

Added Patent Note ........................................................................... 1

Changes to Table 3............................................................................ 3

Changes to OPGND Description Column, Table 12................. 23

Change to Figure 51 ....................................................................... 25

8/11—Rev. 0 to Rev. A

Change to Features Section..............................................................1

Changes to Specifications Section, Table 3 ....................................3

Subsequent Timing Parameters Sequentially ................................5

Changes to Figure 2 and Figure 3....................................................6

Changes to Figure 4...........................................................................7

Changes to Figure 42...................................................................... 16

Changes to Figure 43...................................................................... 16

Added Figure 44, Figure 45, and Figure 46, Renumbered

Sequentially ..................................................................................... 16

7/10—Revision 0: Initial Version